Symbol: MISC_REG_AEU_GENERAL_ATTN_4
sys/dev/bxe/ecore_reg.h
380
#define MISC_REG_AEU_GENERAL_ATTN_4 \
sys/dev/qlnx/qlnxe/reg_addr.h
36384
#define MISC_REG_AEU_GENERAL_ATTN_4 0x008410UL //Access:RW DataWidth:0x1 // Set/clr general attention 4; this will set/clr bit 52 in AEU vector.