sys/dev/qlnx/qlnxe/reg_addr.h
36655
#define MISC_REG_AEU_CLR_LATCH_SIGNAL 0x00882cUL //Access:W DataWidth:0xa // Write to this register results with the clear of the latched signals; [0] one clears Latched MCP memory parity; [1] one clears Latched MCP Scratchpad Cache attention; [3:2] reserved; [4] one clears pglue_misc_mps_attn; [5] one clears pxp_misc_exp_rom_attn; [6] one clears PERST_N assertion (goes 0); [7] one clears PERST_N de-assertion (goes 1). [8] one clears PCIe link up. [9] one clears PCIe hot reset.
