SOC15_WAIT_ON_RREG
SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS,
SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_DPG_PAUSE,
SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS,
SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS,
SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_DPG_PAUSE,
SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS,
SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_STATUS, UVD_STATUS__IDLE, 0x7, ret_code);
SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_LMI_STATUS, tmp, tmp, ret_code);
SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_LMI_STATUS, tmp, tmp, ret_code);
SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS,
SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_RBC_RB_RPTR, tmp, 0xFFFFFFFF, ret_code);
SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS,
SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_STATUS, UVD_STATUS__IDLE,
SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS, UVD_PGFSM_STATUS__UVDM_UVDU_PWR_ON, 0xFFFFFF, ret);
SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS, 0, 0xFFFFFFFF, ret);
SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS, data, 0xFFFFFFFF, ret);