sys/dev/drm/amd/powerplay/inc/smu72_discrete.h

350

typedef struct SMU72_Discrete_DpmTable SMU72_Discrete_DpmTable;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1097

offsetof(SMU72_Discrete_DpmTable, MemoryLevel);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1174

SMU72_Discrete_DpmTable *table)

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1308

SMU72_Discrete_DpmTable *table)

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1368

SMU72_Discrete_DpmTable *table)

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1414

SMU72_Discrete_DpmTable *table)

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1523

SMU72_Discrete_DpmTable *table)

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1747

SMU72_Discrete_DpmTable *table)

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1831

SMU72_Discrete_DpmTable *dpm_table = &(smu_data->smc_state_table);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2226

SMU72_Discrete_DpmTable *table = &(smu_data->smc_state_table);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2437

smu_data->smu7_data.dpm_table_start + offsetof(SMU72_Discrete_DpmTable, SystemFlags),

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2439

sizeof(SMU72_Discrete_DpmTable) - 3 * sizeof(SMU72_PIDController),

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2583

offsetof(SMU72_Discrete_DpmTable,

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2636

return offsetof(SMU72_Discrete_DpmTable, UvdBootLevel);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2638

return offsetof(SMU72_Discrete_DpmTable, VceBootLevel);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2640

return offsetof(SMU72_Discrete_DpmTable, LowSclkInterruptThreshold);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2686

offsetof(SMU72_Discrete_DpmTable, UvdBootLevel);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

2720

offsetof(SMU72_Discrete_DpmTable, VceBootLevel);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

302

SMU72_Discrete_DpmTable *table)

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3155

offsetof(SMU72_Discrete_DpmTable, GraphicsLevel);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

3158

offsetof(SMU72_Discrete_DpmTable, MemoryLevel);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

319

SMU72_Discrete_DpmTable *table)

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

336

SMU72_Discrete_DpmTable *table)

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

366

SMU72_Discrete_DpmTable *table)

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

391

SMU72_Discrete_DpmTable *table)

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

446

SMU72_Discrete_DpmTable *table)

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

501

struct SMU72_Discrete_DpmTable *table)

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

506

static int tonga_populate_smc_link_level(struct pp_hwmgr *hwmgr, SMU72_Discrete_DpmTable *table)

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

694

offsetof(SMU72_Discrete_DpmTable, GraphicsLevel);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.h

66

struct SMU72_Discrete_DpmTable smc_state_table;