sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

1901

PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_RESET_CNTL, rst_reg, 0);

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

2359

PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_RESET_CNTL, rst_reg, 1);

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

108

SMC_SYSCON_RESET_CNTL, rst_reg, 1);

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

123

SMC_SYSCON_RESET_CNTL, rst_reg, 0);

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

176

SMC_SYSCON_RESET_CNTL, rst_reg, 1);

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

191

SMC_SYSCON_RESET_CNTL, rst_reg, 0);

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

111

SMC_SYSCON_RESET_CNTL, rst_reg, 0);

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

119

SMC_SYSCON_RESET_CNTL,

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

207

SMC_SYSCON_RESET_CNTL, rst_reg, 1);

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

221

SMC_SYSCON_RESET_CNTL, rst_reg, 0);

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

242

SMC_SYSCON_RESET_CNTL, rst_reg, 1);

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

245

SMC_SYSCON_RESET_CNTL, rst_reg, 0);

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

266

SMC_SYSCON_RESET_CNTL,

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

280

SMC_SYSCON_RESET_CNTL, rst_reg, 0);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

102

SMC_SYSCON_RESET_CNTL, rst_reg, 1);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

118

SMC_SYSCON_RESET_CNTL, rst_reg, 0);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

168

SMC_SYSCON_RESET_CNTL, rst_reg, 1);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

184

SMC_SYSCON_RESET_CNTL, rst_reg, 0);

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

110

SMC_SYSCON_RESET_CNTL, rst_reg, 1);

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

124

SMC_SYSCON_RESET_CNTL, rst_reg, 0);

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

145

SMC_SYSCON_RESET_CNTL, rst_reg, 1);

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

148

SMC_SYSCON_RESET_CNTL, rst_reg, 0);

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

169

SMC_SYSCON_RESET_CNTL,

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

183

SMC_SYSCON_RESET_CNTL, rst_reg, 0);

sys/dev/drm/radeon/ci_smc.c

116

u32 tmp = RREG32_SMC(SMC_SYSCON_RESET_CNTL);

sys/dev/drm/radeon/ci_smc.c

119

WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp);

sys/dev/drm/radeon/ci_smc.c

124

u32 tmp = RREG32_SMC(SMC_SYSCON_RESET_CNTL);

sys/dev/drm/radeon/ci_smc.c

127

WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp);

sys/dev/drm/radeon/si_smc.c

115

u32 tmp = RREG32_SMC(SMC_SYSCON_RESET_CNTL);

sys/dev/drm/radeon/si_smc.c

119

WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp);

sys/dev/drm/radeon/si_smc.c

131

tmp = RREG32_SMC(SMC_SYSCON_RESET_CNTL);

sys/dev/drm/radeon/si_smc.c

133

WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp);

sys/dev/drm/radeon/si_smc.c

163

u32 rst = RREG32_SMC(SMC_SYSCON_RESET_CNTL);