sys/dev/drm/amd/amdgpu/si_dpm.c

4758

SMC_SIslands_MCArbDramTimingRegisterSet *arb_regs)

sys/dev/drm/amd/amdgpu/si_dpm.c

4788

SMC_SIslands_MCArbDramTimingRegisterSet arb_regs = { 0 };

sys/dev/drm/amd/amdgpu/si_dpm.c

4798

sizeof(SMC_SIslands_MCArbDramTimingRegisterSet) * (first_arb_set + i),

sys/dev/drm/amd/amdgpu/si_dpm.c

4800

sizeof(SMC_SIslands_MCArbDramTimingRegisterSet),

sys/dev/drm/amd/amdgpu/si_dpm.c

5127

SMC_SIslands_MCArbDramTimingRegisterSet arb_regs = { 0 };

sys/dev/drm/amd/amdgpu/si_dpm.c

5141

sizeof(SMC_SIslands_MCArbDramTimingRegisterSet) * SISLANDS_ULV_STATE_ARB_INDEX,

sys/dev/drm/amd/amdgpu/si_dpm.c

5143

sizeof(SMC_SIslands_MCArbDramTimingRegisterSet),

sys/dev/drm/amd/amdgpu/sislands_smc.h

337

typedef struct SMC_SIslands_MCArbDramTimingRegisterSet SMC_SIslands_MCArbDramTimingRegisterSet;

sys/dev/drm/amd/amdgpu/sislands_smc.h

343

SMC_SIslands_MCArbDramTimingRegisterSet data[16];

sys/dev/drm/radeon/si_dpm.c

4297

SMC_SIslands_MCArbDramTimingRegisterSet *arb_regs)

sys/dev/drm/radeon/si_dpm.c

4327

SMC_SIslands_MCArbDramTimingRegisterSet arb_regs = { 0 };

sys/dev/drm/radeon/si_dpm.c

4337

sizeof(SMC_SIslands_MCArbDramTimingRegisterSet) * (first_arb_set + i),

sys/dev/drm/radeon/si_dpm.c

4339

sizeof(SMC_SIslands_MCArbDramTimingRegisterSet),

sys/dev/drm/radeon/si_dpm.c

4667

SMC_SIslands_MCArbDramTimingRegisterSet arb_regs = { 0 };

sys/dev/drm/radeon/si_dpm.c

4681

sizeof(SMC_SIslands_MCArbDramTimingRegisterSet) * SISLANDS_ULV_STATE_ARB_INDEX,

sys/dev/drm/radeon/si_dpm.c

4683

sizeof(SMC_SIslands_MCArbDramTimingRegisterSet),

sys/dev/drm/radeon/sislands_smc.h

337

typedef struct SMC_SIslands_MCArbDramTimingRegisterSet SMC_SIslands_MCArbDramTimingRegisterSet;

sys/dev/drm/radeon/sislands_smc.h

343

SMC_SIslands_MCArbDramTimingRegisterSet data[16];