sys/dev/drm/amd/amdgpu/si_dpm.c

4080

if (RREG32(SMC_RESP_0) == 1)

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

215

PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0);

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

217

ret = PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP);

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

142

PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0);

sys/dev/drm/amd/powerplay/smumgr/smu7_smumgr.c

170

PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0);

sys/dev/drm/amd/powerplay/smumgr/smu7_smumgr.c

172

ret = PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP);

sys/dev/drm/amd/powerplay/smumgr/smu7_smumgr.c

182

PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0);

sys/dev/drm/amd/powerplay/smumgr/smu7_smumgr.c

184

ret = PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP);

sys/dev/drm/amd/powerplay/smumgr/smu7_smumgr.c

203

PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0);

sys/dev/drm/amd/powerplay/smumgr/smu7_smumgr.c

223

PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0);

sys/dev/drm/amd/powerplay/smumgr/smu7_smumgr.c

225

if (1 != PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP))

sys/dev/drm/radeon/ci_dpm.c

1702

tmp = RREG32(SMC_RESP_0);

sys/dev/drm/radeon/ci_dpm.c

1707

tmp = RREG32(SMC_RESP_0);

sys/dev/drm/radeon/ci_dpm.c

1979

if (RREG32(SMC_RESP_0) == 1)

sys/dev/drm/radeon/kv_smc.c

38

if ((RREG32(SMC_RESP_0) & SMC_RESP_MASK) != 0)

sys/dev/drm/radeon/kv_smc.c

42

tmp = RREG32(SMC_RESP_0) & SMC_RESP_MASK;

sys/dev/drm/radeon/si_dpm.c

3624

if (RREG32(SMC_RESP_0) == 1)

sys/dev/drm/radeon/si_smc.c

183

tmp = RREG32(SMC_RESP_0);

sys/dev/drm/radeon/si_smc.c

188

tmp = RREG32(SMC_RESP_0);

sys/dev/drm/radeon/trinity_smc.c

37

if (RREG32(SMC_RESP_0) != 0)

sys/dev/drm/radeon/trinity_smc.c

41

v = RREG32(SMC_RESP_0);