Symbol: SFB
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
130
SFB(blk, GRPH_CONTROL, GRPH_NUM_BANKS, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
131
SFB(blk, GRPH_CONTROL, GRPH_BANK_WIDTH, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
132
SFB(blk, GRPH_CONTROL, GRPH_BANK_HEIGHT, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
133
SFB(blk, GRPH_CONTROL, GRPH_MACRO_TILE_ASPECT, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
134
SFB(blk, GRPH_CONTROL, GRPH_TILE_SPLIT, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
135
SFB(blk, GRPH_CONTROL, GRPH_MICRO_TILE_MODE, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
136
SFB(blk, GRPH_CONTROL, GRPH_PIPE_CONFIG, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
137
SFB(blk, GRPH_CONTROL, GRPH_ARRAY_MODE, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
138
SFB(blk, GRPH_CONTROL, GRPH_COLOR_EXPANSION_MODE, mask_sh)
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
141
SFB(blk, GRPH_ENABLE, GRPH_ENABLE, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
142
SFB(blk, GRPH_CONTROL, GRPH_DEPTH, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
143
SFB(blk, GRPH_CONTROL, GRPH_FORMAT, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
144
SFB(blk, GRPH_CONTROL, GRPH_NUM_BANKS, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
145
SFB(blk, GRPH_X_START, GRPH_X_START, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
146
SFB(blk, GRPH_Y_START, GRPH_Y_START, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
147
SFB(blk, GRPH_X_END, GRPH_X_END, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
148
SFB(blk, GRPH_Y_END, GRPH_Y_END, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
149
SFB(blk, GRPH_PITCH, GRPH_PITCH, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
150
SFB(blk, HW_ROTATION, GRPH_ROTATION_ANGLE, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
151
SFB(blk, GRPH_SWAP_CNTL, GRPH_RED_CROSSBAR, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
152
SFB(blk, GRPH_SWAP_CNTL, GRPH_BLUE_CROSSBAR, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
153
SFB(blk, PRESCALE_GRPH_CONTROL, GRPH_PRESCALE_SELECT, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
154
SFB(blk, PRESCALE_GRPH_CONTROL, GRPH_PRESCALE_R_SIGN, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
155
SFB(blk, PRESCALE_GRPH_CONTROL, GRPH_PRESCALE_G_SIGN, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
156
SFB(blk, PRESCALE_GRPH_CONTROL, GRPH_PRESCALE_B_SIGN, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
157
SFB(blk, GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
158
SFB(blk, GRPH_SECONDARY_SURFACE_ADDRESS, GRPH_SECONDARY_SURFACE_ADDRESS, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
159
SFB(blk, GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
160
SFB(blk, GRPH_PRIMARY_SURFACE_ADDRESS, GRPH_PRIMARY_SURFACE_ADDRESS, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
161
SFB(blk, GRPH_UPDATE, GRPH_SURFACE_UPDATE_PENDING, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
162
SFB(blk, GRPH_UPDATE, GRPH_UPDATE_LOCK, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
163
SFB(blk, GRPH_FLIP_CONTROL, GRPH_SURFACE_UPDATE_H_RETRACE_EN, mask_sh)
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
166
SFB(blk, GRPH_PIPE_OUTSTANDING_REQUEST_LIMIT, GRPH_PIPE_OUTSTANDING_REQUEST_LIMIT, mask_sh)
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
169
SFB(blk, DVMM_PTE_CONTROL, DVMM_PAGE_WIDTH, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
170
SFB(blk, DVMM_PTE_CONTROL, DVMM_PAGE_HEIGHT, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
171
SFB(blk, DVMM_PTE_CONTROL, DVMM_MIN_PTE_BEFORE_FLIP, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
172
SFB(blk, DVMM_PTE_ARB_CONTROL, DVMM_PTE_REQ_PER_CHUNK, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
173
SFB(blk, DVMM_PTE_ARB_CONTROL, DVMM_MAX_PTE_REQ_OUTSTANDING, mask_sh)
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
176
SFB(blk, DPG_PIPE_ARBITRATION_CONTROL1, PIXEL_DURATION, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
177
SFB(blk, DPG_WATERMARK_MASK_CONTROL, URGENCY_WATERMARK_MASK, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
178
SFB(blk, DPG_WATERMARK_MASK_CONTROL, STUTTER_EXIT_SELF_REFRESH_WATERMARK_MASK, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
179
SFB(blk, DPG_PIPE_URGENCY_CONTROL, URGENCY_LOW_WATERMARK, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
180
SFB(blk, DPG_PIPE_URGENCY_CONTROL, URGENCY_HIGH_WATERMARK, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
181
SFB(blk, DPG_PIPE_STUTTER_CONTROL, STUTTER_ENABLE, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
182
SFB(blk, DPG_PIPE_STUTTER_CONTROL, STUTTER_IGNORE_FBC, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
187
SFB(blk, DPG_PIPE_STUTTER_CONTROL, STUTTER_EXIT_SELF_REFRESH_WATERMARK, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
188
SFB(blk, DPG_WATERMARK_MASK_CONTROL, NB_PSTATE_CHANGE_WATERMARK_MASK, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
189
SFB(blk, DPG_PIPE_NB_PSTATE_CHANGE_CONTROL, NB_PSTATE_CHANGE_ENABLE, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
190
SFB(blk, DPG_PIPE_NB_PSTATE_CHANGE_CONTROL, NB_PSTATE_CHANGE_URGENT_DURING_REQUEST, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
191
SFB(blk, DPG_PIPE_NB_PSTATE_CHANGE_CONTROL, NB_PSTATE_CHANGE_NOT_SELF_REFRESH_DURING_REQUEST, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
192
SFB(blk, DPG_PIPE_NB_PSTATE_CHANGE_CONTROL, NB_PSTATE_CHANGE_WATERMARK, mask_sh)
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
209
SFB(blk, GRPH_CONTROL, GRPH_SW_MODE, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
210
SFB(blk, GRPH_CONTROL, GRPH_SE_ENABLE, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
211
SFB(blk, GRPH_CONTROL, GRPH_NUM_SHADER_ENGINES, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
212
SFB(blk, GRPH_CONTROL, GRPH_NUM_PIPES, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
213
SFB(blk, GRPH_CONTROL, GRPH_COLOR_EXPANSION_MODE, mask_sh)
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
216
SFB(blk, DPG_PIPE_STUTTER_CONTROL2, STUTTER_EXIT_SELF_REFRESH_WATERMARK, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
217
SFB(blk, DPG_PIPE_STUTTER_CONTROL2, STUTTER_ENTER_SELF_REFRESH_WATERMARK, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
218
SFB(blk, DPG_PIPE_URGENT_LEVEL_CONTROL, URGENT_LEVEL_LOW_WATERMARK, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
219
SFB(blk, DPG_PIPE_URGENT_LEVEL_CONTROL, URGENT_LEVEL_HIGH_WATERMARK, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
220
SFB(blk, DPG_PIPE_URGENCY_CONTROL, URGENCY_LOW_WATERMARK, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
221
SFB(blk, DPG_PIPE_URGENCY_CONTROL, URGENCY_HIGH_WATERMARK, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
222
SFB(blk, DPG_WATERMARK_MASK_CONTROL, PSTATE_CHANGE_WATERMARK_MASK, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
223
SFB(blk, DPG_PIPE_LOW_POWER_CONTROL, PSTATE_CHANGE_ENABLE, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
224
SFB(blk, DPG_PIPE_LOW_POWER_CONTROL, PSTATE_CHANGE_URGENT_DURING_REQUEST, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
225
SFB(blk, DPG_PIPE_LOW_POWER_CONTROL, PSTATE_CHANGE_NOT_SELF_REFRESH_DURING_REQUEST, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_mem_input.h
226
SFB(blk, DPG_PIPE_LOW_POWER_CONTROL, PSTATE_CHANGE_WATERMARK, mask_sh)