Symbol: SCL
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
109
if (read_bit_from_ddc(ddc, SCL))
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
137
write_bit_to_ddc(ddc_handle, SCL, true);
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
142
write_bit_to_ddc(ddc_handle, SCL, false);
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
158
write_bit_to_ddc(ddc_handle, SCL, true);
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
169
write_bit_to_ddc(ddc_handle, SCL, false);
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
192
write_bit_to_ddc(ddc_handle, SCL, true);
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
200
write_bit_to_ddc(ddc_handle, SCL, false);
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
221
write_bit_to_ddc(ddc_handle, SCL, true);
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
226
write_bit_to_ddc(ddc_handle, SCL, false);
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
247
write_bit_to_ddc(ddc_handle, SCL, false);
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
255
write_bit_to_ddc(ddc_handle, SCL, true);
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
331
write_bit_to_ddc(ddc_handle, SCL, true);
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
345
write_bit_to_ddc(ddc_handle, SCL, true);
sys/dev/drm/amd/display/dc/dce/dce_i2c_sw.c
354
write_bit_to_ddc(ddc_handle, SCL, false);
sys/dev/drm/amd/display/dc/dce/dce_transform.h
76
SRI(SCL_MODE, SCL, id), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
77
SRI(SCL_TAP_CONTROL, SCL, id), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
78
SRI(SCL_CONTROL, SCL, id), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
79
SRI(SCL_BYPASS_CONTROL, SCL, id), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
80
SRI(EXT_OVERSCAN_LEFT_RIGHT, SCL, id), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
81
SRI(EXT_OVERSCAN_TOP_BOTTOM, SCL, id), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
82
SRI(SCL_VERT_FILTER_CONTROL, SCL, id), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
83
SRI(SCL_HORZ_FILTER_CONTROL, SCL, id), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
84
SRI(SCL_COEF_RAM_SELECT, SCL, id), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
85
SRI(SCL_COEF_RAM_TAP_DATA, SCL, id), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
86
SRI(VIEWPORT_START, SCL, id), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
87
SRI(VIEWPORT_SIZE, SCL, id), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
88
SRI(SCL_HORZ_FILTER_SCALE_RATIO, SCL, id), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
89
SRI(SCL_VERT_FILTER_SCALE_RATIO, SCL, id), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
90
SRI(SCL_HORZ_FILTER_INIT, SCL, id), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
91
SRI(SCL_VERT_FILTER_INIT, SCL, id), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
92
SRI(SCL_AUTOMATIC_MODE_CONTROL, SCL, id), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
94
SRI(SCL_UPDATE, SCL, id), \
sys/dev/drm/amd/display/dc/dce/dce_transform.h
95
SRI(SCL_F_SHARP_CONTROL, SCL, id)
sys/dev/drm/amd/display/dc/gpio/ddc_regs.h
149
DDC_I2C_REG_LIST(SCL)\
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
115
write_bit_to_ddc(ddc_handle, SCL, true);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
129
write_bit_to_ddc(ddc_handle, SCL, true);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
138
write_bit_to_ddc(ddc_handle, SCL, false);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
158
write_bit_to_ddc(ddc_handle, SCL, false);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
166
write_bit_to_ddc(ddc_handle, SCL, true);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
203
write_bit_to_ddc(ddc_handle, SCL, true);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
208
write_bit_to_ddc(ddc_handle, SCL, false);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
223
write_bit_to_ddc(ddc_handle, SCL, true);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
234
write_bit_to_ddc(ddc_handle, SCL, false);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
256
write_bit_to_ddc(ddc_handle, SCL, true);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
264
write_bit_to_ddc(ddc_handle, SCL, false);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
284
write_bit_to_ddc(ddc_handle, SCL, true);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
289
write_bit_to_ddc(ddc_handle, SCL, false);
sys/dev/drm/amd/display/dc/i2caux/i2c_sw_engine.c
94
if (read_bit_from_ddc(ddc, SCL))