RW
if (RW) {
RW(reg[chain], R92C_HSSI_PARAM2_READ_ADDR, addr) |
reg = RW(reg, R92C_EFUSE_CTRL_ADDR, sc->last_rom_addr);
reg = RW(reg, R92C_MCUFWDL_PAGE, page);
RW(reg, R92C_AFE_XTAL_CTRL_ADDR,
reg = RW(reg, R92C_TXAGC_A_CCK1, power[0]);
reg = RW(reg, R92C_TXAGC_A_CCK2, power[1]);
reg = RW(reg, R92C_TXAGC_A_CCK55, power[2]);
reg = RW(reg, R92C_TXAGC_A_CCK11, power[3]);
reg = RW(reg, R92C_TXAGC_B_CCK1, power[0]);
reg = RW(reg, R92C_TXAGC_B_CCK2, power[1]);
reg = RW(reg, R92C_TXAGC_B_CCK55, power[2]);
reg = RW(reg, R92C_TXAGC_B_CCK11, power[3]);
reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain);
reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain);
RW(sc->rf_chnlbw[i], R92C_RF_CHNLBW_CHNL, chan));
RW(rf_ac[i], R92C_RF_AC_MODE,
reg = RW(reg, R92C_RRSR_RATE_BITMAP, R92C_RRSR_RATE_CCK_ONLY_1M);
reg = RW(reg, R92C_TDECTRL_BLK_DESC_NUM, 6);
RW seminfo.semmsl
mode = RW & ~umask(RW);