sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4150

WREG32_FIELD(RLC_CNTL, RLC_ENABLE_F32, 0);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4167

WREG32_FIELD(RLC_CNTL, RLC_ENABLE_F32, 1);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2424

WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 0);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2443

WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 1);

sys/dev/drm/radeon/cik.c

5837

tmp = RREG32(RLC_CNTL);

sys/dev/drm/radeon/cik.c

5839

WREG32(RLC_CNTL, rlc);

sys/dev/drm/radeon/cik.c

5846

orig = data = RREG32(RLC_CNTL);

sys/dev/drm/radeon/cik.c

5852

WREG32(RLC_CNTL, data);

sys/dev/drm/radeon/cik.c

5904

WREG32(RLC_CNTL, 0);

sys/dev/drm/radeon/cik.c

5920

WREG32(RLC_CNTL, RLC_ENABLE);

sys/dev/drm/radeon/evergreen.c

4360

WREG32(RLC_CNTL, mask);

sys/dev/drm/radeon/r600.c

1695

WREG32(RLC_CNTL, 0);

sys/dev/drm/radeon/r600.c

1827

WREG32(RLC_CNTL, 0);

sys/dev/drm/radeon/r600.c

3557

WREG32(RLC_CNTL, 0);

sys/dev/drm/radeon/r600.c

3562

WREG32(RLC_CNTL, RLC_ENABLE);

sys/dev/drm/radeon/si.c

5195

orig = data = RREG32(RLC_CNTL);

sys/dev/drm/radeon/si.c

5199

WREG32(RLC_CNTL, data);

sys/dev/drm/radeon/si.c

5211

tmp = RREG32(RLC_CNTL);

sys/dev/drm/radeon/si.c

5213

WREG32(RLC_CNTL, rlc);

sys/dev/drm/radeon/si.c

5807

WREG32(RLC_CNTL, 0);

sys/dev/drm/radeon/si.c

5816

WREG32(RLC_CNTL, RLC_ENABLE);