Symbol: REG_UPDATE_2
sys/dev/drm/amd/display/dc/dce/dce_abm.c
178
REG_UPDATE_2(BL_PWM_GRP1_REG_LOCK,
sys/dev/drm/amd/display/dc/dce/dce_abm.c
211
REG_UPDATE_2(MASTER_COMM_CMD_REG,
sys/dev/drm/amd/display/dc/dce/dce_abm.c
281
REG_UPDATE_2(DC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES,
sys/dev/drm/amd/display/dc/dce/dce_abm.c
307
REG_UPDATE_2(MASTER_COMM_CMD_REG,
sys/dev/drm/amd/display/dc/dce/dce_abm.c
325
REG_UPDATE_2(MASTER_COMM_CMD_REG,
sys/dev/drm/amd/display/dc/dce/dce_audio.c
814
REG_UPDATE_2(DCCG_AUDIO_DTO_SOURCE,
sys/dev/drm/amd/display/dc/dce/dce_audio.c
907
REG_UPDATE_2(AZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES,
sys/dev/drm/amd/display/dc/dce/dce_aux.c
205
REG_UPDATE_2(AUX_SW_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_clock_source.c
827
REG_UPDATE_2(PIXCLK_RESYNC_CNTL,
sys/dev/drm/amd/display/dc/dce/dce_dmcu.c
327
REG_UPDATE_2(DMCU_RAM_ACCESS_CTRL,
sys/dev/drm/amd/display/dc/dce/dce_dmcu.c
340
REG_UPDATE_2(DMCU_RAM_ACCESS_CTRL,
sys/dev/drm/amd/display/dc/dce/dce_dmcu.c
354
REG_UPDATE_2(DMCU_RAM_ACCESS_CTRL,
sys/dev/drm/amd/display/dc/dce/dce_dmcu.c
369
REG_UPDATE_2(DMCU_RAM_ACCESS_CTRL,
sys/dev/drm/amd/display/dc/dce/dce_dmcu.c
455
REG_UPDATE_2(DMCU_RAM_ACCESS_CTRL,
sys/dev/drm/amd/display/dc/dce/dce_dmcu.c
467
REG_UPDATE_2(DMCU_RAM_ACCESS_CTRL,
sys/dev/drm/amd/display/dc/dce/dce_dmcu.c
73
REG_UPDATE_2(DMCU_RAM_ACCESS_CTRL,
sys/dev/drm/amd/display/dc/dce/dce_dmcu.c
85
REG_UPDATE_2(DMCU_RAM_ACCESS_CTRL,
sys/dev/drm/amd/display/dc/dce/dce_hwseq.c
177
REG_UPDATE_2(PHYPLL_PIXEL_RATE_CNTL[tg_inst],
sys/dev/drm/amd/display/dc/dce/dce_hwseq.c
187
REG_UPDATE_2(PIXEL_RATE_CNTL[tg_inst],
sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c
245
REG_UPDATE_2(DC_I2C_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c
296
REG_UPDATE_2(DC_I2C_ARBITRATION,
sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c
339
REG_UPDATE_2(DC_I2C_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
1255
REG_UPDATE_2(DP_MSE_SAT0,
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
1269
REG_UPDATE_2(DP_MSE_SAT0,
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
1283
REG_UPDATE_2(DP_MSE_SAT1,
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
1297
REG_UPDATE_2(DP_MSE_SAT1,
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
299
REG_UPDATE_2(DP_DPHY_PRBS_CNTL,
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
319
REG_UPDATE_2(DP_DPHY_PRBS_CNTL,
sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c
540
REG_UPDATE_2(DP_SEC_CNTL1,
sys/dev/drm/amd/display/dc/dce/dce_mem_input.c
158
REG_UPDATE_2(DVMM_PTE_ARB_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_mem_input.c
238
REG_UPDATE_2(DPG_PIPE_STUTTER_CONTROL2,
sys/dev/drm/amd/display/dc/dce/dce_mem_input.c
242
REG_UPDATE_2(DPG_PIPE_STUTTER_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_mem_input.c
279
REG_UPDATE_2(DPG_PIPE_STUTTER_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_mem_input.c
308
REG_UPDATE_2(DPG_PIPE_STUTTER_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_mem_input.c
341
REG_UPDATE_2(DPG_PIPE_STUTTER_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_mem_input.c
493
REG_UPDATE_2(GRPH_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_opp.c
188
REG_UPDATE_2(FMT_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_opp.c
192
REG_UPDATE_2(FMT_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_opp.c
198
REG_UPDATE_2(FMT_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_opp.c
272
REG_UPDATE_2(FMT_BIT_DEPTH_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_opp.c
391
REG_UPDATE_2(FMT_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_opp.c
396
REG_UPDATE_2(FMT_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_opp.c
457
REG_UPDATE_2(FMT_DYNAMIC_EXP_CNTL,
sys/dev/drm/amd/display/dc/dce/dce_opp.c
468
REG_UPDATE_2(FMT_DYNAMIC_EXP_CNTL,
sys/dev/drm/amd/display/dc/dce/dce_opp.c
473
REG_UPDATE_2(FMT_DYNAMIC_EXP_CNTL,
sys/dev/drm/amd/display/dc/dce/dce_opp.c
478
REG_UPDATE_2(
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
134
REG_UPDATE_2(AFMT_VBI_PACKET_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
1355
REG_UPDATE_2(HDMI_AUDIO_PACKET_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
1363
REG_UPDATE_2(AFMT_AUDIO_PACKET_CONTROL2,
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
1409
REG_UPDATE_2(AFMT_60958_0,
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
1450
REG_UPDATE_2(AFMT_AUDIO_PACKET_CONTROL2,
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
1492
REG_UPDATE_2(DP_SEC_CNTL,
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
439
REG_UPDATE_2(
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
581
REG_UPDATE_2(HDMI_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
585
REG_UPDATE_2(HDMI_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
592
REG_UPDATE_2(HDMI_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
596
REG_UPDATE_2(HDMI_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
602
REG_UPDATE_2(HDMI_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
616
REG_UPDATE_2(HDMI_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
628
REG_UPDATE_2(HDMI_CONTROL,
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
754
REG_UPDATE_2(HDMI_INFOFRAME_CONTROL0,
sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c
762
REG_UPDATE_2(HDMI_INFOFRAME_CONTROL0,
sys/dev/drm/amd/display/dc/dce/dce_transform.c
125
REG_UPDATE_2(SCL_MODE, SCL_MODE, 0, SCL_PSCL_EN, 0);
sys/dev/drm/amd/display/dc/dce/dce_transform.c
1306
REG_UPDATE_2(DCFE_MEM_PWR_CTRL,
sys/dev/drm/amd/display/dc/dce/dce_transform.c
1310
REG_UPDATE_2(DCFE_MEM_LIGHT_SLEEP_CNTL,
sys/dev/drm/amd/display/dc/dce/dce_transform.c
788
REG_UPDATE_2(LB_DATA_FORMAT,
sys/dev/drm/amd/display/dc/dce120/dce120_hw_sequencer.c
206
REG_UPDATE_2(DCHUB_FB_LOCATION,
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c
433
REG_UPDATE_2(CURSOR0_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_dpp.c
497
REG_UPDATE_2(DPP_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c
130
REG_UPDATE_2(DCHUBBUB_ARB_DRAM_STATE_CNTL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c
218
REG_UPDATE_2(DCHUBBUB_ARB_DRAM_STATE_CNTL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c
523
REG_UPDATE_2(DCHUBBUB_ARB_DRAM_STATE_CNTL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_hubbub.c
528
REG_UPDATE_2(DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c
1067
REG_UPDATE_2(CURSOR_SIZE,
sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c
187
REG_UPDATE_2(DCSURF_SURFACE_PITCH,
sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c
191
REG_UPDATE_2(DCSURF_SURFACE_PITCH_C,
sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c
211
REG_UPDATE_2(DCSURF_SURFACE_CONFIG,
sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c
215
REG_UPDATE_2(DCSURF_SURFACE_CONFIG,
sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c
219
REG_UPDATE_2(DCSURF_SURFACE_CONFIG,
sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c
223
REG_UPDATE_2(DCSURF_SURFACE_CONFIG,
sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c
245
REG_UPDATE_2(HUBPRET_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c
351
REG_UPDATE_2(DCSURF_SURFACE_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c
46
REG_UPDATE_2(DCHUBP_CNTL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
1174
REG_UPDATE_2(DP_MSE_SAT0,
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
1188
REG_UPDATE_2(DP_MSE_SAT0,
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
1202
REG_UPDATE_2(DP_MSE_SAT1,
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
1216
REG_UPDATE_2(DP_MSE_SAT1,
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
264
REG_UPDATE_2(DP_DPHY_PRBS_CNTL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
284
REG_UPDATE_2(DP_DPHY_PRBS_CNTL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
484
REG_UPDATE_2(DP_SEC_CNTL1,
sys/dev/drm/amd/display/dc/dcn10/dcn10_opp.c
192
REG_UPDATE_2(FMT_CLAMP_CNTL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_opp.c
198
REG_UPDATE_2(FMT_CLAMP_CNTL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_opp.c
203
REG_UPDATE_2(FMT_CLAMP_CNTL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_opp.c
208
REG_UPDATE_2(FMT_CLAMP_CNTL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_opp.c
214
REG_UPDATE_2(FMT_CLAMP_CNTL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_opp.c
234
REG_UPDATE_2(FMT_DYNAMIC_EXP_CNTL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_opp.c
246
REG_UPDATE_2(FMT_DYNAMIC_EXP_CNTL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_opp.c
251
REG_UPDATE_2(FMT_DYNAMIC_EXP_CNTL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_opp.c
256
REG_UPDATE_2(FMT_DYNAMIC_EXP_CNTL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_opp.c
77
REG_UPDATE_2(FMT_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_opp.c
81
REG_UPDATE_2(FMT_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_opp.c
88
REG_UPDATE_2(FMT_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c
1325
REG_UPDATE_2(OTG_CRC0_WINDOWA_X_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c
1330
REG_UPDATE_2(OTG_CRC0_WINDOWA_Y_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c
1335
REG_UPDATE_2(OTG_CRC0_WINDOWB_X_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c
1340
REG_UPDATE_2(OTG_CRC0_WINDOWB_Y_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c
202
REG_UPDATE_2(OTG_H_SYNC_A,
sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c
224
REG_UPDATE_2(OTG_H_BLANK_START_END,
sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c
251
REG_UPDATE_2(OTG_V_SYNC_A,
sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c
269
REG_UPDATE_2(OTG_V_BLANK_START_END,
sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c
319
REG_UPDATE_2(CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c
324
REG_UPDATE_2(OTG_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c
376
REG_UPDATE_2(OTG_BLANK_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c
390
REG_UPDATE_2(OTG_BLANK_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c
424
REG_UPDATE_2(OPTC_INPUT_CLOCK_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c
433
REG_UPDATE_2(OTG_CLOCK_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c
440
REG_UPDATE_2(OTG_CLOCK_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c
444
REG_UPDATE_2(OPTC_INPUT_CLOCK_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c
473
REG_UPDATE_2(OTG_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c
488
REG_UPDATE_2(OTG_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c
913
REG_UPDATE_2(OTG_TEST_PATTERN_PARAMETERS,
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
1196
REG_UPDATE_2(AFMT_AUDIO_PACKET_CONTROL2,
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
1244
REG_UPDATE_2(AFMT_60958_0,
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
1287
REG_UPDATE_2(AFMT_AUDIO_PACKET_CONTROL2,
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
1329
REG_UPDATE_2(DP_SEC_CNTL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
333
REG_UPDATE_2(DP_PIXEL_FORMAT,
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
515
REG_UPDATE_2(HDMI_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
519
REG_UPDATE_2(HDMI_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
526
REG_UPDATE_2(HDMI_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
530
REG_UPDATE_2(HDMI_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
536
REG_UPDATE_2(HDMI_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
549
REG_UPDATE_2(HDMI_CONTROL,
sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
561
REG_UPDATE_2(HDMI_CONTROL,
sys/dev/drm/amd/display/dc/gpio/hw_ddc.c
179
REG_UPDATE_2(ddc_setup,
sys/dev/drm/amd/display/dc/gpio/hw_hpd.c
110
REG_UPDATE_2(toggle_filt_cntl,
sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c
235
REG_UPDATE_2(AUX_SW_CONTROL,
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
134
REG_UPDATE_2(
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
180
REG_UPDATE_2(
sys/dev/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c
228
REG_UPDATE_2(