REG_RD
val = REG_RD(sc, BCE_CTX_CTX_CTRL);
val = REG_RD(sc, BCE_EMAC_MDIO_MODE);
REG_RD(sc, BCE_EMAC_MDIO_MODE);
val = REG_RD(sc, BCE_EMAC_MDIO_COMM);
val = REG_RD(sc, BCE_EMAC_MDIO_COMM);
val = REG_RD(sc, BCE_EMAC_MDIO_COMM);
val = REG_RD(sc, BCE_EMAC_MDIO_MODE);
REG_RD(sc, BCE_EMAC_MDIO_MODE);
val1 = REG_RD(sc, BCE_EMAC_MDIO_MODE);
REG_RD(sc, BCE_EMAC_MDIO_MODE);
val1 = REG_RD(sc, BCE_EMAC_MDIO_COMM);
val1 = REG_RD(sc, BCE_EMAC_MDIO_MODE);
REG_RD(sc, BCE_EMAC_MDIO_MODE);
val = REG_RD(sc, BCE_NVM_SW_ARB);
val = REG_RD(sc, BCE_NVM_SW_ARB);
val = REG_RD(sc, BCE_NVM_ACCESS_ENABLE);
val = REG_RD(sc, BCE_NVM_ACCESS_ENABLE);
val = REG_RD(sc, BCE_NVM_COMMAND);
val = REG_RD(sc, BCE_NVM_READ);
val = REG_RD(sc, BCE_NVM_CFG1);
uint32_t val = REG_RD(sc, BCE_MISC_DUAL_MEDIA_CTRL);
val = REG_RD(sc, BCE_CTX_COMMAND);
val = REG_RD(sc, BCE_CTX_HOST_PAGE_TBL_CTRL);
REG_RD(sc, BCE_MISC_ENABLE_CLR_BITS);
val = REG_RD(sc, BCE_MISC_ENABLE_CLR_BITS);
val = REG_RD(sc, BCE_MISC_NEW_CORE_CTL);
val = REG_RD(sc, BCE_MISC_ID);
REG_RD(sc, BCE_MISC_COMMAND);
val = REG_RD(sc, BCE_PCICFG_MISC_CONFIG);
val = REG_RD(sc, BCE_PCI_SWAP_DIAG0);
REG_RD(sc, BCE_PCICFG_INT_ACK_CMD);
val = REG_RD(sc, BCE_RPM_MGMT_PKT_CTRL) |
val = REG_RD(sc, BCE_MQ_CONFIG);
val = REG_RD(sc, BCE_TBDR_CONFIG);
val = REG_RD(sc, BCE_MISC_NEW_CORE_CTL);
val = REG_RD(sc, BCE_RPM_MGMT_PKT_CTRL) &
REG_RD(sc, BCE_MISC_ENABLE_SET_BITS);
sc->hc_command = REG_RD(sc, BCE_HC_COMMAND);
val = REG_RD(rxr->sc, BCE_MQ_MAP_L2_5);
REG_RD(sc, BCE_PCICFG_INT_ACK_CMD);
REG_RD(sc, BCE_MISC_ENABLE_SET_BITS);
if (REG_RD(sc, BCE_EMAC_TX_STATUS) & BCE_EMAC_TX_STATUS_XOFFED)
REG_RD(sc, BCE_HC_COMMAND);
REG_RD(sc, BCE_HC_COMMAND);
(REG_RD(sc, BCE_PCICFG_MISC_STATUS) &
REG_RD(sc, BCE_PCICFG_INT_ACK_CMD);
msi_ctrl = REG_RD(sc, BCE_PCICFG_MSI_CONTROL);
REG_RD(sc, BCE_PCI_MSIX_CONTROL);
sc->bce_chipid = REG_RD(sc, BCE_MISC_ID);
val = REG_RD(sc, BCE_PCICFG_MISC_STATUS);
clkreg = REG_RD(sc, BCE_PCICFG_PCI_CLOCK_CONTROL_BITS) &
#define BCE_SETBIT(sc, reg, x) REG_WR(sc, reg, (REG_RD(sc, reg) | (x)))
#define BCE_CLRBIT(sc, reg, x) REG_WR(sc, reg, (REG_RD(sc, reg) & ~(x)))