sys/dev/drm/i915/i915_cmd_parser.c

552

REG32(GEN7_3DPRIM_END_OFFSET),

sys/dev/drm/i915/i915_cmd_parser.c

553

REG32(GEN7_3DPRIM_START_VERTEX),

sys/dev/drm/i915/i915_cmd_parser.c

554

REG32(GEN7_3DPRIM_VERTEX_COUNT),

sys/dev/drm/i915/i915_cmd_parser.c

555

REG32(GEN7_3DPRIM_INSTANCE_COUNT),

sys/dev/drm/i915/i915_cmd_parser.c

556

REG32(GEN7_3DPRIM_START_INSTANCE),

sys/dev/drm/i915/i915_cmd_parser.c

557

REG32(GEN7_3DPRIM_BASE_VERTEX),

sys/dev/drm/i915/i915_cmd_parser.c

558

REG32(GEN7_GPGPU_DISPATCHDIMX),

sys/dev/drm/i915/i915_cmd_parser.c

559

REG32(GEN7_GPGPU_DISPATCHDIMY),

sys/dev/drm/i915/i915_cmd_parser.c

560

REG32(GEN7_GPGPU_DISPATCHDIMZ),

sys/dev/drm/i915/i915_cmd_parser.c

570

REG32(GEN7_SO_WRITE_OFFSET(0)),

sys/dev/drm/i915/i915_cmd_parser.c

571

REG32(GEN7_SO_WRITE_OFFSET(1)),

sys/dev/drm/i915/i915_cmd_parser.c

572

REG32(GEN7_SO_WRITE_OFFSET(2)),

sys/dev/drm/i915/i915_cmd_parser.c

573

REG32(GEN7_SO_WRITE_OFFSET(3)),

sys/dev/drm/i915/i915_cmd_parser.c

574

REG32(GEN7_L3SQCREG1),

sys/dev/drm/i915/i915_cmd_parser.c

575

REG32(GEN7_L3CNTLREG2),

sys/dev/drm/i915/i915_cmd_parser.c

576

REG32(GEN7_L3CNTLREG3),

sys/dev/drm/i915/i915_cmd_parser.c

597

REG32(HSW_SCRATCH1,

sys/dev/drm/i915/i915_cmd_parser.c

600

REG32(HSW_ROW_CHICKEN3,

sys/dev/drm/i915/i915_cmd_parser.c

609

REG32(BCS_SWCTRL),

sys/dev/drm/i915/i915_cmd_parser.c

614

REG32(FORCEWAKE_MT),

sys/dev/drm/i915/i915_cmd_parser.c

615

REG32(DERRMR),

sys/dev/drm/i915/i915_cmd_parser.c

616

REG32(GEN7_PIPE_DE_LOAD_SL(PIPE_A)),

sys/dev/drm/i915/i915_cmd_parser.c

617

REG32(GEN7_PIPE_DE_LOAD_SL(PIPE_B)),

sys/dev/drm/i915/i915_cmd_parser.c

618

REG32(GEN7_PIPE_DE_LOAD_SL(PIPE_C)),

sys/dev/drm/i915/i915_cmd_parser.c

622

REG32(FORCEWAKE_MT),

sys/dev/drm/i915/i915_cmd_parser.c

623

REG32(DERRMR),