sys/dev/drm/i915/i915_cmd_parser.c

872

case RCS:

sys/dev/drm/i915/i915_drv.h

2565

#define RENDER_RING ENGINE_MASK(RCS)

sys/dev/drm/i915/i915_gem_execbuffer.c

1913

if (!IS_GEN7(rq->i915) || rq->engine->id != RCS) {

sys/dev/drm/i915/i915_gem_execbuffer.c

2027

[I915_EXEC_DEFAULT] = RCS,

sys/dev/drm/i915/i915_gem_execbuffer.c

2028

[I915_EXEC_RENDER] = RCS,

sys/dev/drm/i915/i915_gem_render_state.c

45

if (engine->id != RCS)

sys/dev/drm/i915/i915_gpu_error.c

1251

case RCS:

sys/dev/drm/i915/i915_gpu_error.c

416

if (ee->engine_id != RCS || INTEL_GEN(m->i915) <= 3)

sys/dev/drm/i915/i915_irq.c

1469

notify_ring(dev_priv->engine[RCS]);

sys/dev/drm/i915/i915_irq.c

1478

notify_ring(dev_priv->engine[RCS]);

sys/dev/drm/i915/i915_irq.c

1552

gen8_cs_irq_handler(i915->engine[RCS],

sys/dev/drm/i915/i915_irq.c

3251

POSTING_READ(RING_FAULT_REG(dev_priv->engine[RCS]));

sys/dev/drm/i915/i915_irq.c

4489

notify_ring(dev_priv->engine[RCS]);

sys/dev/drm/i915/i915_irq.c

4599

notify_ring(dev_priv->engine[RCS]);

sys/dev/drm/i915/i915_irq.c

4746

notify_ring(dev_priv->engine[RCS]);

sys/dev/drm/i915/i915_perf.c

1208

struct intel_engine_cs *engine = i915->engine[RCS];

sys/dev/drm/i915/i915_perf.c

1712

struct intel_engine_cs *engine = dev_priv->engine[RCS];

sys/dev/drm/i915/i915_perf.c

2141

if (engine->id != RCS)

sys/dev/drm/i915/i915_pmu.c

104

else if (intel_engine_supports_stats(i915->engine[RCS]))

sys/dev/drm/i915/intel_engine_cs.c

1288

if (engine->id == RCS && IS_GEN(dev_priv, 4, 7))

sys/dev/drm/i915/intel_engine_cs.c

360

if (WARN_ON(!HAS_ENGINE(dev_priv, RCS))) {

sys/dev/drm/i915/intel_engine_cs.c

855

if (engine->id != RCS)

sys/dev/drm/i915/intel_engine_cs.c

871

if (engine->id != RCS)

sys/dev/drm/i915/intel_engine_cs.c

884

if (engine->id == RCS)

sys/dev/drm/i915/intel_engine_cs.c

97

[RCS] = {

sys/dev/drm/i915/intel_guc_ads.c

125

dev_priv->engine[RCS])->state;

sys/dev/drm/i915/intel_guc_submission.c

568

if (engine->id == RCS) {

sys/dev/drm/i915/intel_hangcheck.c

185

if (engine->id != RCS)

sys/dev/drm/i915/intel_lrc.c

1711

if (GEM_WARN_ON(engine->id != RCS))

sys/dev/drm/i915/intel_lrc.c

2389

[RCS] = GEN8_RCS_IRQ_SHIFT,

sys/dev/drm/i915/intel_mocs.c

211

case RCS:

sys/dev/drm/i915/intel_overlay.c

240

struct intel_engine_cs *engine = dev_priv->engine[RCS];

sys/dev/drm/i915/intel_ringbuffer.c

1740

GEM_BUG_ON(engine->id != RCS);

sys/dev/drm/i915/intel_ringbuffer.c

412

case RCS:

sys/dev/drm/i915/intel_ringbuffer.c

438

if (engine->id == RCS)

sys/dev/drm/i915/intel_uncore.c

1913

[RCS] = GEN6_GRDOM_RENDER,

sys/dev/drm/i915/intel_uncore.c

1952

[RCS] = GEN11_GRDOM_RENDER,

sys/dev/drm/i915/intel_workarounds.c

1068

GEM_BUG_ON(engine->id != RCS);

sys/dev/drm/i915/intel_workarounds.c

1256

if (engine->id == RCS)