sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4349

tmp = REG_SET_FIELD(0, CP_RB0_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2683

tmp = REG_SET_FIELD(0, CP_RB0_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

396

tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

820

tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1067

tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

900

tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, size);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1066

tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

893

tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, rb_bufsz);

sys/dev/drm/radeon/evergreen.c

2960

RB_NO_UPDATE | RB_BLKSZ(15) | RB_BUFSZ(3));

sys/dev/drm/radeon/r600.c

2667

RB_NO_UPDATE | RB_BLKSZ(15) | RB_BUFSZ(3));

sys/dev/drm/radeon/rv770.c

1098

RB_NO_UPDATE | RB_BLKSZ(15) | RB_BUFSZ(3));