RADEON_GPU_PAGE_SIZE
tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;
(order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8);
tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;
rb_cntl |= order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8;
uint32_t stride_bytes = RADEON_GPU_PAGE_SIZE;
r = radeon_bo_create(rdev, RADEON_GPU_PAGE_SIZE,
tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;
#define RADEON_GPU_PAGE_MASK (RADEON_GPU_PAGE_SIZE - 1)
radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
size / RADEON_GPU_PAGE_SIZE,
size / RADEON_GPU_PAGE_SIZE,
r = radeon_bo_create(rdev, RADEON_GPU_PAGE_SIZE, PAGE_SIZE, true,
memset(*(void **)wb_ptr, 0, RADEON_GPU_PAGE_SIZE);
t = offset / RADEON_GPU_PAGE_SIZE;
p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
t = offset / RADEON_GPU_PAGE_SIZE;
p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
page_base += RADEON_GPU_PAGE_SIZE;
if (PAGE_SIZE < RADEON_GPU_PAGE_SIZE) {
rdev->gart.num_gpu_pages = rdev->mc.gtt_size / RADEON_GPU_PAGE_SIZE;
args->offset = bo_va->it.start * RADEON_GPU_PAGE_SIZE;
RADEON_GPU_PAGE_SIZE,
RADEON_GPU_PAGE_SIZE,
return (bo->tbo.num_pages << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE;
return (bo->tbo.mem.page_alignment << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE;
size / RADEON_GPU_PAGE_SIZE,
size / RADEON_GPU_PAGE_SIZE,
size / RADEON_GPU_PAGE_SIZE,
size / RADEON_GPU_PAGE_SIZE,
BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0);
num_pages = new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
RADEON_GPU_PAGE_SIZE;
RADEON_GPU_PAGE_SIZE;
last_pfn = eoffset / RADEON_GPU_PAGE_SIZE;
soffset /= RADEON_GPU_PAGE_SIZE;
eoffset /= RADEON_GPU_PAGE_SIZE;
RADEON_GPU_PAGE_SIZE, true,
RADEON_GPU_PAGE_SIZE, flags);
RADEON_GPU_PAGE_SIZE, flags);
addr += RADEON_GPU_PAGE_SIZE * count;
RADEON_GPU_PAGE_SIZE, flags | frag_flags);
addr += RADEON_GPU_PAGE_SIZE * count;
RADEON_GPU_PAGE_SIZE, flags);
dst += nptes * RADEON_GPU_PAGE_SIZE;
tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;
tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;
tmp = (order_base_2(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;