PLANE_CURSOR
if (INTEL_GEN(dev_priv) >= 9 && plane->id != PLANE_CURSOR) {
if (plane->id != PLANE_CURSOR)
if (plane->id != PLANE_CURSOR)
hw_plane_wm = &hw_wm.planes[PLANE_CURSOR];
sw_plane_wm = &sw_wm->planes[PLANE_CURSOR];
hw_ddb_entry = &hw_ddb.plane[pipe][PLANE_CURSOR];
sw_ddb_entry = &sw_ddb->plane[pipe][PLANE_CURSOR];
if (plane->id == PLANE_CURSOR &&
cursor->id = PLANE_CURSOR;
if (intel_plane->id == PLANE_CURSOR)
WARN_ON(!(crtc_state->active_planes & ~BIT(PLANE_CURSOR)));
if (!(crtc_state->active_planes & ~BIT(PLANE_CURSOR)))
FW_WM(wm->pipe[PIPE_C].plane[PLANE_CURSOR], CURSORC));
case PLANE_CURSOR:
if (plane->id == PLANE_CURSOR)
if (plane->id == PLANE_CURSOR) {
g4x_raw_plane_wm_is_valid(crtc_state, PLANE_CURSOR, level);
~BIT(PLANE_CURSOR));
wm_state->sr.cursor = raw->plane[PLANE_CURSOR];
wm_state->hpll.cursor = raw->plane[PLANE_CURSOR];
g4x_plane_fifo_size(PLANE_CURSOR, G4X_WM_LEVEL_SR)) &&
g4x_plane_fifo_size(PLANE_CURSOR, G4X_WM_LEVEL_HPLL)) &&
if (plane->id == PLANE_CURSOR) {
unsigned int active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
fifo_state->plane[PLANE_CURSOR] = 63;
int max_wm = plane_id == PLANE_CURSOR ? 63 : 511;
vlv_raw_plane_wm_is_valid(crtc_state, PLANE_CURSOR, level);
~BIT(PLANE_CURSOR));
if (dirty & ~BIT(PLANE_CURSOR)) {
vlv_invert_wm_value(raw->plane[PLANE_CURSOR],
WARN_ON(fifo_state->plane[PLANE_CURSOR] != 63);
wm->ddl[pipe].plane[PLANE_CURSOR] = DDL_PRECISION_HIGH | 2;
if (plane_id == PLANE_CURSOR) {
if (plane->id == PLANE_CURSOR) {
if (intel_plane->id == PLANE_CURSOR)
if (plane_id == PLANE_CURSOR)
minimum[PLANE_CURSOR] = skl_cursor_allocation(num_active);
ddb->plane[pipe][PLANE_CURSOR].start = alloc->end - minimum[PLANE_CURSOR];
ddb->plane[pipe][PLANE_CURSOR].end = alloc->end;
if (plane_id == PLANE_CURSOR)
if (plane->id == PLANE_CURSOR) {
fifo_state->plane[PLANE_CURSOR] = 63;
&ddb->plane[pipe][PLANE_CURSOR]);
if (plane_id != PLANE_CURSOR)
if (plane_id != PLANE_CURSOR)
if (plane_id != PLANE_CURSOR)
wm->pipe[PIPE_B].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORB);
wm->pipe[PIPE_A].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORA);
wm->ddl[pipe].plane[PLANE_CURSOR] =
wm->pipe[PIPE_B].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORB);
wm->pipe[PIPE_A].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORA);
wm->pipe[PIPE_C].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORC);
raw->plane[PLANE_CURSOR] = active->sr.cursor;
raw->plane[PLANE_CURSOR] = active->hpll.cursor;
wm->pipe[pipe].plane[PLANE_CURSOR],
wm->pipe[pipe].plane[PLANE_CURSOR],
if (plane->id == PLANE_CURSOR)
FW_WM(wm->pipe[PIPE_B].plane[PLANE_CURSOR], CURSORB) |
FW_WM(wm->pipe[PIPE_A].plane[PLANE_CURSOR], CURSORA) |
(wm->ddl[pipe].plane[PLANE_CURSOR] << DDL_CURSOR_SHIFT) |
FW_WM(wm->pipe[PIPE_B].plane[PLANE_CURSOR], CURSORB) |
FW_WM(wm->pipe[PIPE_A].plane[PLANE_CURSOR], CURSORA) |
if (plane_id == PLANE_CURSOR)