sys/dev/drm/i915/intel_display.c

11681

PIPE_CONF_CHECK_X(lane_lat_optim_mask);

sys/dev/drm/i915/intel_display.c

11691

PIPE_CONF_CHECK_X(output_types);

sys/dev/drm/i915/intel_display.c

11734

PIPE_CONF_CHECK_X(gmch_pfit.control);

sys/dev/drm/i915/intel_display.c

11737

PIPE_CONF_CHECK_X(gmch_pfit.pgm_ratios);

sys/dev/drm/i915/intel_display.c

11738

PIPE_CONF_CHECK_X(gmch_pfit.lvds_border_bits);

sys/dev/drm/i915/intel_display.c

11746

PIPE_CONF_CHECK_X(pch_pfit.pos);

sys/dev/drm/i915/intel_display.c

11747

PIPE_CONF_CHECK_X(pch_pfit.size);

sys/dev/drm/i915/intel_display.c

11757

PIPE_CONF_CHECK_X(dpll_hw_state.dpll);

sys/dev/drm/i915/intel_display.c

11758

PIPE_CONF_CHECK_X(dpll_hw_state.dpll_md);

sys/dev/drm/i915/intel_display.c

11759

PIPE_CONF_CHECK_X(dpll_hw_state.fp0);

sys/dev/drm/i915/intel_display.c

11760

PIPE_CONF_CHECK_X(dpll_hw_state.fp1);

sys/dev/drm/i915/intel_display.c

11761

PIPE_CONF_CHECK_X(dpll_hw_state.wrpll);

sys/dev/drm/i915/intel_display.c

11762

PIPE_CONF_CHECK_X(dpll_hw_state.spll);

sys/dev/drm/i915/intel_display.c

11763

PIPE_CONF_CHECK_X(dpll_hw_state.ctrl1);

sys/dev/drm/i915/intel_display.c

11764

PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr1);

sys/dev/drm/i915/intel_display.c

11765

PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr2);

sys/dev/drm/i915/intel_display.c

11766

PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr0);

sys/dev/drm/i915/intel_display.c

11767

PIPE_CONF_CHECK_X(dpll_hw_state.ebb0);

sys/dev/drm/i915/intel_display.c

11768

PIPE_CONF_CHECK_X(dpll_hw_state.ebb4);

sys/dev/drm/i915/intel_display.c

11769

PIPE_CONF_CHECK_X(dpll_hw_state.pll0);

sys/dev/drm/i915/intel_display.c

11770

PIPE_CONF_CHECK_X(dpll_hw_state.pll1);

sys/dev/drm/i915/intel_display.c

11771

PIPE_CONF_CHECK_X(dpll_hw_state.pll2);

sys/dev/drm/i915/intel_display.c

11772

PIPE_CONF_CHECK_X(dpll_hw_state.pll3);

sys/dev/drm/i915/intel_display.c

11773

PIPE_CONF_CHECK_X(dpll_hw_state.pll6);

sys/dev/drm/i915/intel_display.c

11774

PIPE_CONF_CHECK_X(dpll_hw_state.pll8);

sys/dev/drm/i915/intel_display.c

11775

PIPE_CONF_CHECK_X(dpll_hw_state.pll9);

sys/dev/drm/i915/intel_display.c

11776

PIPE_CONF_CHECK_X(dpll_hw_state.pll10);

sys/dev/drm/i915/intel_display.c

11777

PIPE_CONF_CHECK_X(dpll_hw_state.pcsdw12);

sys/dev/drm/i915/intel_display.c

11778

PIPE_CONF_CHECK_X(dpll_hw_state.mg_refclkin_ctl);

sys/dev/drm/i915/intel_display.c

11779

PIPE_CONF_CHECK_X(dpll_hw_state.mg_clktop2_coreclkctl1);

sys/dev/drm/i915/intel_display.c

11780

PIPE_CONF_CHECK_X(dpll_hw_state.mg_clktop2_hsclkctl);

sys/dev/drm/i915/intel_display.c

11781

PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_div0);

sys/dev/drm/i915/intel_display.c

11782

PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_div1);

sys/dev/drm/i915/intel_display.c

11783

PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_lf);

sys/dev/drm/i915/intel_display.c

11784

PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_frac_lock);

sys/dev/drm/i915/intel_display.c

11785

PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_ssc);

sys/dev/drm/i915/intel_display.c

11786

PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_bias);

sys/dev/drm/i915/intel_display.c

11787

PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_tdc_coldst_bias);

sys/dev/drm/i915/intel_display.c

11789

PIPE_CONF_CHECK_X(dsi_pll.ctrl);

sys/dev/drm/i915/intel_display.c

11790

PIPE_CONF_CHECK_X(dsi_pll.div);