PIPE_C
REG32(GEN7_PIPE_DE_LOAD_SL(PIPE_C)),
case PIPE_C:
} else if (num_scalers_need == 1 && intel_crtc->pipe != PIPE_C) {
case PIPE_C:
*pipe = PIPE_C;
info->num_scalers[PIPE_C] = 1;
info->num_sprites[PIPE_C] = 1;
disabled_mask |= BIT(PIPE_C);
case BIT(PIPE_A) | BIT(PIPE_C):
if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_C &&
if (INTEL_GEN(dev_priv) == 9 && !IS_GEMINILAKE(dev_priv) && pipe == PIPE_C)
WARN_ON(I915_READ(FDI_RX_CTL(PIPE_C)) & FDI_RX_ENABLE);
case PIPE_C:
other_crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_C);
case PIPE_C:
(pipe == PIPE_B || pipe == PIPE_C))
trans_edp_pipe = PIPE_C;
case PIPE_C:
FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_SPRITE1], SPRITEF) |
FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_SPRITE0], SPRITEE));
FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_PRIMARY], PLANEC) |
FW_WM(wm->pipe[PIPE_C].plane[PLANE_CURSOR], CURSORC));
FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE1] >> 8, SPRITEF_HI) |
FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE0] >> 8, SPRITEE_HI) |
FW_WM(wm->pipe[PIPE_C].plane[PLANE_PRIMARY] >> 8, PLANEC_HI) |
wm_state->cxsr = crtc->pipe != PIPE_C && num_active_planes == 1;
case PIPE_C:
if (dirty & WM_DIRTY_PIPE(PIPE_C))
if (dirty & WM_DIRTY_LINETIME(PIPE_C))
I915_WRITE(PIPE_WM_LINETIME(PIPE_C), results->wm_linetime[2]);
case PIPE_C:
[PIPE_C] = WM0_PIPEC_IVB,
wm->pipe[PIPE_C].plane[PLANE_SPRITE1] = _FW_WM_VLV(tmp, SPRITEF);
wm->pipe[PIPE_C].plane[PLANE_SPRITE0] = _FW_WM_VLV(tmp, SPRITEE);
wm->pipe[PIPE_C].plane[PLANE_PRIMARY] = _FW_WM_VLV(tmp, PLANEC);
wm->pipe[PIPE_C].plane[PLANE_CURSOR] = _FW_WM(tmp, CURSORC);
wm->pipe[PIPE_C].plane[PLANE_SPRITE1] |= _FW_WM(tmp, SPRITEF_HI) << 8;
wm->pipe[PIPE_C].plane[PLANE_SPRITE0] |= _FW_WM(tmp, SPRITEE_HI) << 8;
wm->pipe[PIPE_C].plane[PLANE_PRIMARY] |= _FW_WM(tmp, PLANEC_HI) << 8;
pipe = PIPE_C;
assert_pll_disabled(dev_priv, PIPE_C);
enum i915_pipe pipe = phy == DPIO_PHY0 ? PIPE_A : PIPE_C;
.hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
.hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
.hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
.hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
.hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
.hsw.irq_pipe_mask = BIT(PIPE_C),
return pipe != PIPE_C;
return pipe != PIPE_C &&
if (WARN_ON(tmp > PIPE_C))
intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);