sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2526

PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2534

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2545

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4069

cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4079

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1277

cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1288

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4267

PACKET3(PACKET3_SET_CONTEXT_REG,

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4277

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2635

PACKET3(PACKET3_SET_CONTEXT_REG,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

903

cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));

sys/dev/drm/radeon/cik.c

4039

radeon_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/drm/radeon/cik.c

6748

cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));

sys/dev/drm/radeon/cik.c

6758

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/drm/radeon/evergreen_cs.c

2315

case PACKET3_SET_CONTEXT_REG:

sys/dev/drm/radeon/evergreen_cs.c

3394

case PACKET3_SET_CONTEXT_REG:

sys/dev/drm/radeon/r600_cs.c

1924

case PACKET3_SET_CONTEXT_REG:

sys/dev/drm/radeon/si.c

3595

radeon_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/drm/radeon/si.c

4562

case PACKET3_SET_CONTEXT_REG:

sys/dev/drm/radeon/si.c

4665

case PACKET3_SET_CONTEXT_REG:

sys/dev/drm/radeon/si.c

5723

cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));

sys/dev/drm/radeon/si.c

5733

buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1));