Symbol: OS_REG_RMW_FIELD
sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c
431
OS_REG_RMW_FIELD(ah, AR_IFS0, AR_IFS0_SIFS,
sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c
482
OS_REG_RMW_FIELD(ah, AR_TIME_OUT,
sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c
529
OS_REG_RMW_FIELD(ah, AR_TIME_OUT,
sys/dev/netif/ath/ath_hal/ar5210/ar5210_power.c
36
OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_ALLOW);
sys/dev/netif/ath/ath_hal/ar5210/ar5210_power.c
56
OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_WAKE);
sys/dev/netif/ath/ath_hal/ar5210/ar5210_power.c
64
OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE,
sys/dev/netif/ath/ath_hal/ar5210/ar5210_power.c
90
OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_SLP);
sys/dev/netif/ath/ath_hal/ar5211/ar5211_beacon.c
182
OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLDUR,
sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c
484
OS_REG_RMW_FIELD(ah, AR_TIME_OUT,
sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c
531
OS_REG_RMW_FIELD(ah, AR_TIME_OUT,
sys/dev/netif/ath/ath_hal/ar5211/ar5211_power.c
45
OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_WAKE);
sys/dev/netif/ath/ath_hal/ar5211/ar5211_power.c
53
OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE,
sys/dev/netif/ath/ath_hal/ar5211/ar5211_power.c
79
OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_SLP);
sys/dev/netif/ath/ath_hal/ar5211/ar5211_power.c
92
OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_NORM);
sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c
1212
OS_REG_RMW_FIELD(ah, AR_PHY_FRAME_CTL,
sys/dev/netif/ath/ath_hal/ar5211/ar5211_reset.c
423
OS_REG_RMW_FIELD(ah, AR_PHY_FRAME_CTL,
sys/dev/netif/ath/ath_hal/ar5211/ar5211_xmit.c
190
OS_REG_RMW_FIELD(ah, AR_IMR_S2,
sys/dev/netif/ath/ath_hal/ar5212/ar2316.c
547
OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
sys/dev/netif/ath/ath_hal/ar5212/ar2317.c
525
OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
sys/dev/netif/ath/ath_hal/ar5212/ar2413.c
545
OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
sys/dev/netif/ath/ath_hal/ar5212/ar2425.c
533
OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_ani.c
247
OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_ani.c
249
OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_ani.c
251
OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_ani.c
253
OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_ani.c
272
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_ani.c
274
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_ani.c
276
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_ani.c
278
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_ani.c
280
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_ani.c
282
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_ani.c
301
OS_REG_RMW_FIELD(ah, AR_PHY_CCK_DETECT,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_ani.c
319
OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_ani.c
337
OS_REG_RMW_FIELD(ah, AR_PHY_TIMING5,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c
1232
OS_REG_RMW_FIELD(ah, AR_PHY_RADAR_2,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c
1236
OS_REG_RMW_FIELD(ah, AR_PHY_RADAR_2,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c
1240
OS_REG_RMW_FIELD(ah, AR_PHY_RADAR_2,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c
509
OS_REG_RMW_FIELD(ah, AR_TIME_OUT,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c
556
OS_REG_RMW_FIELD(ah, AR_TIME_OUT,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c
692
OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32, 1);
sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c
694
OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_SEL, 1);
sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c
702
OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_RATE_IND, 0x2);
sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c
708
OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_RATE_IND, 0x3);
sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c
711
OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_RATE_IND, 0x0);
sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c
712
OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_SEL, 0);
sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c
729
OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c
742
OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_RATE_IND, 0);
sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c
743
OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_SEL, 0);
sys/dev/netif/ath/ath_hal/ar5212/ar5212_misc.c
746
OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_power.c
112
OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_NORM);
sys/dev/netif/ath/ath_hal/ar5212/ar5212_power.c
99
OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_SLP);
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
1057
OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
1059
OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
1076
OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
1635
OS_REG_RMW_FIELD(ah, AR_PHY_FRAME_CTL,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
1677
OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
1679
OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
1681
OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
1683
OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
1721
OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
1723
OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
1730
OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
1807
OS_REG_RMW_FIELD(ah, AR_PHY_MASK_CTL, AR_PHY_MASK_CTL_RATE, 0);
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
1817
OS_REG_RMW_FIELD(ah, AR_PHY_TIMING8, AR_PHY_TIMING8_PILOT_MASK_2, 0);
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
1819
OS_REG_RMW_FIELD(ah, AR_PHY_TIMING10, AR_PHY_TIMING10_PILOT_MASK_2, 0);
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
1825
OS_REG_RMW_FIELD(ah, AR_PHY_MASK_CTL, AR_PHY_MASK_CTL_MASK_4, 0);
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
1829
OS_REG_RMW_FIELD(ah, AR_PHY_BIN_MASK2_4, AR_PHY_BIN_MASK2_4_MASK_4, 0);
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
1895
OS_REG_RMW_FIELD(ah, AR_PHY_MASK_CTL, AR_PHY_MASK_CTL_RATE, 0xFF);
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
1907
OS_REG_RMW_FIELD(ah, AR_PHY_TIMING8, AR_PHY_TIMING8_PILOT_MASK_2, pilotMask[1]);
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
1909
OS_REG_RMW_FIELD(ah, AR_PHY_TIMING10, AR_PHY_TIMING10_PILOT_MASK_2, pilotMask[1]);
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
1915
OS_REG_RMW_FIELD(ah, AR_PHY_MASK_CTL, AR_PHY_MASK_CTL_MASK_4, binMagMask[3]);
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
1919
OS_REG_RMW_FIELD(ah, AR_PHY_BIN_MASK2_4, AR_PHY_BIN_MASK2_4_MASK_4, binMagMask[3]);
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
1973
OS_REG_RMW_FIELD(ah, AR_PHY_TIMING3,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
1975
OS_REG_RMW_FIELD(ah, AR_PHY_TIMING3,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
2800
OS_REG_RMW_FIELD(ah, AR_D_GBL_IFS_MISC,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
321
OS_REG_RMW_FIELD(ah, AR_PHY_FRAME_CTL,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
358
OS_REG_RMW_FIELD(ah, AR_PHY_DAG_CTRLCCK,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
372
OS_REG_RMW_FIELD(ah, AR_D_FPCTL, ... );
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
473
OS_REG_RMW_FIELD(ah, AR_PHY_TX_CTL,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_reset.c
543
OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4,
sys/dev/netif/ath/ath_hal/ar5212/ar5212_xmit.c
223
OS_REG_RMW_FIELD(ah, AR_IMR_S2,
sys/dev/netif/ath/ath_hal/ar5212/ar5413.c
589
OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
sys/dev/netif/ath/ath_hal/ar5312/ar5312_misc.c
114
OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32, 1);
sys/dev/netif/ath/ath_hal/ar5312/ar5312_misc.c
119
OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32,
sys/dev/netif/ath/ath_hal/ar5312/ar5312_misc.c
147
OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32,
sys/dev/netif/ath/ath_hal/ar5312/ar5312_reset.c
266
OS_REG_RMW_FIELD(ah, AR_PHY_DAG_CTRLCCK,
sys/dev/netif/ath/ath_hal/ar5312/ar5312_reset.c
280
OS_REG_RMW_FIELD(ah, AR_D_FPCTL, ... );
sys/dev/netif/ath/ath_hal/ar5312/ar5312_reset.c
295
OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN, AR_PHY_RXGAIN_TXRX_RF_MAX, 0x0F);
sys/dev/netif/ath/ath_hal/ar5312/ar5312_reset.c
299
OS_REG_RMW_FIELD(ah, AR_PHY_CCK_RXCTRL4, AR_PHY_CCK_RXCTRL4_FREQ_EST_SHORT, 12);
sys/dev/netif/ath/ath_hal/ar5312/ar5312_reset.c
306
OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_AGC, 32);
sys/dev/netif/ath/ath_hal/ar5312/ar5312_reset.c
391
OS_REG_RMW_FIELD(ah, AR_PHY_TX_CTL,
sys/dev/netif/ath/ath_hal/ar5312/ar5312_reset.c
467
OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_ani.c
237
OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_ani.c
239
OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_ani.c
241
OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_ani.c
243
OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_ani.c
263
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_ani.c
265
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_ani.c
267
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_ani.c
269
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_ani.c
271
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_ani.c
273
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_ani.c
276
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_ani.c
278
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_ani.c
280
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_ani.c
282
OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_ani.c
304
OS_REG_RMW_FIELD(ah, AR_PHY_CCK_DETECT,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_ani.c
323
OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_ani.c
342
OS_REG_RMW_FIELD(ah, AR_PHY_TIMING5,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_beacon.c
179
OS_REG_RMW_FIELD(ah, AR_RSSI_THR,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_btcoex.c
241
OS_REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_btcoex.c
243
OS_REG_RMW_FIELD(ah, AR_MISC_MODE, AR_PCU_BT_ANT_PREVENT_RX,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_btcoex.c
287
OS_REG_RMW_FIELD(ah, AR_QUIET1,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_btcoex.c
290
OS_REG_RMW_FIELD(ah, AR_MISC_MODE,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_btcoex.c
293
OS_REG_RMW_FIELD(ah, AR_QUIET1,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_btcoex.c
296
OS_REG_RMW_FIELD(ah, AR_MISC_MODE,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_btcoex.c
345
OS_REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_btcoex.c
348
OS_REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_btcoex.c
383
OS_REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_cal.c
100
OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_cal_iq.c
122
OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4_CHAIN(i),
sys/dev/netif/ath/ath_hal/ar5416/ar5416_cal_iq.c
124
OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4_CHAIN(i),
sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c
219
OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_ENABLE,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c
224
OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_MASK,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c
230
OS_REG_RMW_FIELD(ah, AR_INTR_SYNC_ENABLE,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c
235
OS_REG_RMW_FIELD(ah, AR_INTR_SYNC_MASK,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c
240
OS_REG_RMW_FIELD(ah, AR_INTR_SYNC_CAUSE,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c
252
OS_REG_RMW_FIELD(ah, AR_GPIO_INTR_POL,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c
258
OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_ENABLE,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c
263
OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_MASK,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c
269
OS_REG_RMW_FIELD(ah, AR_INTR_SYNC_ENABLE,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c
274
OS_REG_RMW_FIELD(ah, AR_INTR_SYNC_MASK,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_misc.c
434
OS_REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
sys/dev/netif/ath/ath_hal/ar5416/ar5416_misc.c
85
OS_REG_RMW_FIELD(ah, AR_MAC_LED,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_misc.c
99
OS_REG_RMW_FIELD(ah, AR_MAC_LED, AR_MAC_LED_MODE,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1539
OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1542
OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1545
OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1548
OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1552
OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1555
OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1562
OS_REG_RMW_FIELD(ah,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1565
OS_REG_RMW_FIELD(ah,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1569
OS_REG_RMW_FIELD(ah,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1572
OS_REG_RMW_FIELD(ah,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1670
OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_SWITCH, pModal->switchSettling);
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1671
OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, AR_PHY_DESIRED_SZ_ADC, pModal->adcDesiredSize);
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1674
OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, AR_PHY_DESIRED_SZ_PGA, pModal->pgaDesiredSize);
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1682
OS_REG_RMW_FIELD(ah, AR_PHY_RF_CTL3, AR_PHY_TX_END_TO_A2_RX_ON,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1686
OS_REG_RMW_FIELD(ah, AR_PHY_CCA, AR9280_PHY_CCA_THRESH62,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1688
OS_REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0, AR_PHY_EXT_CCA0_THRESH62,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1691
OS_REG_RMW_FIELD(ah, AR_PHY_CCA, AR_PHY_CCA_THRESH62,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1693
OS_REG_RMW_FIELD(ah, AR_PHY_EXT_CCA, AR_PHY_EXT_CCA_THRESH62,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1699
OS_REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, AR_PHY_TX_FRAME_TO_DATA_START,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1701
OS_REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, AR_PHY_TX_FRAME_TO_PA_ON,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1707
OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_SWITCH,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1711
OS_REG_RMW_FIELD(ah, AR_PHY_CCK_TX_CTRL, AR_PHY_CCK_TX_CTRL_TX_DAC_SCALE_CCK, pModal->miscBits);
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1725
OS_REG_RMW_FIELD(ah, AR_PHY_FRAME_CTL, AR_PHY_FRAME_CTL_TX_CLIP,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
1727
OS_REG_RMW_FIELD(ah, AR_PHY_TX_PWRCTRL9, AR_PHY_TX_DESIRED_SCALE_CCK,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
2890
OS_REG_RMW_FIELD(ah, AR_D_GBL_IFS_MISC,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
345
OS_REG_RMW_FIELD(ah, AR_PHY_FRAME_CTL,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
375
OS_REG_RMW_FIELD(ah, AR_AHB_MODE, AR_AHB_CUSTOM_BURST_EN,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
424
OS_REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, 250);
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
425
OS_REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_FIRST, 700);
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
876
OS_REG_RMW_FIELD(ah, AR_PHY_TIMING3,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
878
OS_REG_RMW_FIELD(ah, AR_PHY_TIMING3,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
890
OS_REG_RMW_FIELD(ah, AR_PHY_HALFGI,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_reset.c
892
OS_REG_RMW_FIELD(ah, AR_PHY_HALFGI,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_xmit.c
1228
OS_REG_RMW_FIELD(ah, AR_IMR_S2,
sys/dev/netif/ath/ath_hal/ar5416/ar5416_xmit.c
836
OS_REG_RMW_FIELD(ah, AR_GTXTO, AR_GTXTO_TIMEOUT_LIMIT, tu);
sys/dev/netif/ath/ath_hal/ar9002/ar9280_olc.c
106
OS_REG_RMW_FIELD(ah, AR_PHY_TX_PWRCTRL6_0, AR_PHY_TX_PWRCTRL_ERR_EST_MODE, 3);
sys/dev/netif/ath/ath_hal/ar9002/ar9280_olc.c
107
OS_REG_RMW_FIELD(ah, AR_PHY_TX_PWRCTRL6_1, AR_PHY_TX_PWRCTRL_ERR_EST_MODE, 3);
sys/dev/netif/ath/ath_hal/ar9002/ar9280_olc.c
109
OS_REG_RMW_FIELD(ah, AR_PHY_TX_PWRCTRL7, AR_PHY_TX_PWRCTRL_INIT_TX_GAIN, initTxGain);
sys/dev/netif/ath/ath_hal/ar9002/ar9280_olc.c
165
OS_REG_RMW_FIELD(ah,
sys/dev/netif/ath/ath_hal/ar9002/ar9285_cal.c
113
OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9285_AN_RF2G3_PDVCCOMP, 1);
sys/dev/netif/ath/ath_hal/ar9002/ar9285_cal.c
116
OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9285_AN_RF2G3_PDVCCOMP, reg_field);
sys/dev/netif/ath/ath_hal/ar9002/ar9285_cal.c
136
OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9285_AN_RF2G6_OFFS, offs_6_1);
sys/dev/netif/ath/ath_hal/ar9002/ar9285_cal.c
137
OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9285_AN_RF2G3_PDVCCOMP, offs_0);
sys/dev/netif/ath/ath_hal/ar9002/ar9285_cal.c
149
OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9285_AN_RF2G6_CCOMP, ccomp_org);
sys/dev/netif/ath/ath_hal/ar9002/ar9285_cal.c
81
OS_REG_RMW_FIELD(ah, AR9285_AN_TOP3, AR9285_AN_TOP3_PWDDAC, 1);
sys/dev/netif/ath/ath_hal/ar9002/ar9285_cal.c
82
OS_REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDRXTXBB1, 1);
sys/dev/netif/ath/ath_hal/ar9002/ar9285_cal.c
83
OS_REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDV2I, 1);
sys/dev/netif/ath/ath_hal/ar9002/ar9285_cal.c
84
OS_REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDDACIF, 1);
sys/dev/netif/ath/ath_hal/ar9002/ar9285_cal.c
85
OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G2, AR9285_AN_RF2G2_OFFCAL, 0);
sys/dev/netif/ath/ath_hal/ar9002/ar9285_cal.c
86
OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PWDDB, 0);
sys/dev/netif/ath/ath_hal/ar9002/ar9285_cal.c
87
OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_ENPACAL, 0);
sys/dev/netif/ath/ath_hal/ar9002/ar9285_cal.c
88
OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV1, 0);
sys/dev/netif/ath/ath_hal/ar9002/ar9285_cal.c
89
OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV2, 0);
sys/dev/netif/ath/ath_hal/ar9002/ar9285_cal.c
90
OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPAOUT, 0);
sys/dev/netif/ath/ath_hal/ar9002/ar9285_cal.c
91
OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G8, AR9285_AN_RF2G8_PADRVGN2TAB0, 7);
sys/dev/netif/ath/ath_hal/ar9002/ar9285_cal.c
92
OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PADRVGN2TAB0, 0);
sys/dev/netif/ath/ath_hal/ar9002/ar9285_cal.c
94
OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9285_AN_RF2G6_CCOMP, 0xf);
sys/dev/netif/ath/ath_hal/ar9002/ar9285_cal.c
98
OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9285_AN_RF2G6_OFFS, 0);
sys/dev/netif/ath/ath_hal/ar9002/ar9285_cal.c
99
OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9285_AN_RF2G3_PDVCCOMP, 0);
sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c
206
OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ,
sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c
208
OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ,
sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c
210
OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ,
sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c
212
OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ,
sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c
216
OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000,
sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c
219
OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000,
sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c
221
OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000,
sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c
224
OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000,
sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c
228
OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN,
sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c
230
OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN,
sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c
233
OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN + 0x1000,
sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c
235
OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN + 0x1000,
sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c
317
OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_SWITCH,
sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c
319
OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, AR_PHY_DESIRED_SZ_ADC,
sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c
328
OS_REG_RMW_FIELD(ah, AR_PHY_RF_CTL3, AR_PHY_TX_END_TO_A2_RX_ON,
sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c
331
OS_REG_RMW_FIELD(ah, AR_PHY_CCA, AR9280_PHY_CCA_THRESH62,
sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c
333
OS_REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0, AR_PHY_EXT_CCA0_THRESH62,
sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c
338
OS_REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, AR_PHY_TX_FRAME_TO_DATA_START,
sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c
340
OS_REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, AR_PHY_TX_FRAME_TO_PA_ON,
sys/dev/netif/ath/ath_hal/ar9002/ar9285_reset.c
347
OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING,
sys/dev/netif/ath/ath_hal/ar9002/ar9287_olc.c
93
OS_REG_RMW_FIELD(ah, AR_PHY_CH0_TX_PWRCTRL11,
sys/dev/netif/ath/ath_hal/ar9002/ar9287_olc.c
95
OS_REG_RMW_FIELD(ah, AR_PHY_CH1_TX_PWRCTRL11,
sys/dev/netif/ath/ath_hal/ar9002/ar9287_reset.c
506
OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
sys/dev/netif/ath/ath_hal/ar9002/ar9287_reset.c
509
OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
sys/dev/netif/ath/ath_hal/ar9002/ar9287_reset.c
512
OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset,
sys/dev/netif/ath/ath_hal/ar9002/ar9287_reset.c
515
OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset,
sys/dev/netif/ath/ath_hal/ar9002/ar9287_reset.c
521
OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING,
sys/dev/netif/ath/ath_hal/ar9002/ar9287_reset.c
524
OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING,
sys/dev/netif/ath/ath_hal/ar9002/ar9287_reset.c
527
OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ,
sys/dev/netif/ath/ath_hal/ar9002/ar9287_reset.c
536
OS_REG_RMW_FIELD(ah, AR_PHY_RF_CTL3,
sys/dev/netif/ath/ath_hal/ar9002/ar9287_reset.c
539
OS_REG_RMW_FIELD(ah, AR_PHY_CCA,
sys/dev/netif/ath/ath_hal/ar9002/ar9287_reset.c
541
OS_REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0,
sys/dev/netif/ath/ath_hal/ar9002/ar9287_reset.c
577
OS_REG_RMW_FIELD(ah, AR_PHY_RF_CTL2,
sys/dev/netif/ath/ath_hal/ar9002/ar9287_reset.c
579
OS_REG_RMW_FIELD(ah, AR_PHY_RF_CTL2,
sys/dev/netif/ath/ath_hal/ar9002/ar9287_reset.c
87
OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
sys/dev/netif/ath/ath_hal/ar9002/ar9287_reset.c
89
OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_1,
sys/dev/netif/ath/ath_hal/ar9002/ar9287_reset.c
91
OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_2,
sys/dev/netif/ath/ath_hal/ar9002/ar9287_reset.c
93
OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3,