MIICTL
CSR_WRITE_4(sc, MIICTL, ((reg << 4) | (phy << 9) | 0x01));
if ((CSR_READ_4(sc, MIICTL) & 0x01) == 0) break;
CSR_WRITE_4(sc, MIICTL, ((reg << 4) | (phy << 9) | 0x02));
if ((CSR_READ_4(sc, MIICTL) & 0x02) == 0) break;