sys/dev/drm/amd/amdgpu/ci_dpm.c

218

case MC_CG_ARB_FREQ_F1:

sys/dev/drm/amd/amdgpu/ci_dpm.c

235

case MC_CG_ARB_FREQ_F1:

sys/dev/drm/amd/amdgpu/ci_dpm.c

2564

tmp |= MC_CG_ARB_FREQ_F1 << 24;

sys/dev/drm/amd/amdgpu/ci_dpm.c

2611

return ci_copy_and_switch_arb_sets(adev, MC_CG_ARB_FREQ_F0, MC_CG_ARB_FREQ_F1);

sys/dev/drm/amd/amdgpu/si_dpm.c

3093

case MC_CG_ARB_FREQ_F1:

sys/dev/drm/amd/amdgpu/si_dpm.c

3118

case MC_CG_ARB_FREQ_F1:

sys/dev/drm/amd/amdgpu/si_dpm.c

4701

tmp |= MC_CG_ARB_FREQ_F1 << 24;

sys/dev/drm/amd/amdgpu/si_dpm.c

4709

return ni_copy_and_switch_arb_sets(adev, MC_CG_ARB_FREQ_F0, MC_CG_ARB_FREQ_F1);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

459

case MC_CG_ARB_FREQ_F1:

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

474

case MC_CG_ARB_FREQ_F1:

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

506

MC_CG_ARB_FREQ_F0, MC_CG_ARB_FREQ_F1);

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1888

tmp |= ((uint32_t)MC_CG_ARB_FREQ_F1) << 24;

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1742

tmp |= ((uint32_t)MC_CG_ARB_FREQ_F1) << 24;

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1819

tmp |= ((uint32_t)MC_CG_ARB_FREQ_F1) << 24;

sys/dev/drm/radeon/ci_dpm.c

2459

tmp |= MC_CG_ARB_FREQ_F1 << 24;

sys/dev/drm/radeon/ci_dpm.c

2508

return ni_copy_and_switch_arb_sets(rdev, MC_CG_ARB_FREQ_F0, MC_CG_ARB_FREQ_F1);

sys/dev/drm/radeon/cypress_dpm.c

798

smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1;

sys/dev/drm/radeon/ni_dpm.c

1518

case MC_CG_ARB_FREQ_F1:

sys/dev/drm/radeon/ni_dpm.c

1543

case MC_CG_ARB_FREQ_F1:

sys/dev/drm/radeon/ni_dpm.c

1582

tmp |= ((u32)MC_CG_ARB_FREQ_F1) << 24;

sys/dev/drm/radeon/ni_dpm.c

1590

return ni_copy_and_switch_arb_sets(rdev, MC_CG_ARB_FREQ_F0, MC_CG_ARB_FREQ_F1);

sys/dev/drm/radeon/rv770_dpm.c

709

smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1;

sys/dev/drm/radeon/si_dpm.c

4241

tmp |= MC_CG_ARB_FREQ_F1 << 24;

sys/dev/drm/radeon/si_dpm.c

4248

return ni_copy_and_switch_arb_sets(rdev, MC_CG_ARB_FREQ_F0, MC_CG_ARB_FREQ_F1);