sys/dev/drm/amd/amdgpu/si_dpm.c

4037

si_pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL);

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

1096

MCLK_PWRMGT_CNTL, DLL_SPEED, mpll_param.dll_speed);

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

1098

MCLK_PWRMGT_CNTL, MRDCK0_PDNB, dllStateOn);

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

1100

MCLK_PWRMGT_CNTL, MRDCK1_PDNB, dllStateOn);

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

1464

MCLK_PWRMGT_CNTL, MRDCK0_RESET, 0x1);

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

1466

MCLK_PWRMGT_CNTL, MRDCK1_RESET, 0x1);

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

1470

MCLK_PWRMGT_CNTL, MRDCK0_PDNB, 0);

sys/dev/drm/amd/powerplay/smumgr/ci_smumgr.c

1472

MCLK_PWRMGT_CNTL, MRDCK1_PDNB, 0);

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1147

MCLK_PWRMGT_CNTL, DLL_SPEED, mpll_param.dll_speed);

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1149

MCLK_PWRMGT_CNTL, MRDCK0_PDNB, dllStateOn);

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1151

MCLK_PWRMGT_CNTL, MRDCK1_PDNB, dllStateOn);

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1512

MCLK_PWRMGT_CNTL, MRDCK0_RESET, 0x1);

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1514

MCLK_PWRMGT_CNTL, MRDCK1_RESET, 0x1);

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1518

MCLK_PWRMGT_CNTL, MRDCK0_PDNB, 0);

sys/dev/drm/amd/powerplay/smumgr/iceland_smumgr.c

1520

MCLK_PWRMGT_CNTL, MRDCK1_PDNB, 0);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1254

MCLK_PWRMGT_CNTL, MRDCK0_RESET, 0x1);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1256

MCLK_PWRMGT_CNTL, MRDCK1_RESET, 0x1);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1260

MCLK_PWRMGT_CNTL, MRDCK0_PDNB, 0);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1262

MCLK_PWRMGT_CNTL, MRDCK1_PDNB, 0);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

898

MCLK_PWRMGT_CNTL, DLL_SPEED, mpll_param.dll_speed);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

900

MCLK_PWRMGT_CNTL, MRDCK0_PDNB, dllStateOn);

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

902

MCLK_PWRMGT_CNTL, MRDCK1_PDNB, dllStateOn);

sys/dev/drm/radeon/ci_dpm.c

1921

pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL);

sys/dev/drm/radeon/cypress_dpm.c

257

WREG32_P(MCLK_PWRMGT_CNTL, 0, ~MPLL_PWRMGT_OFF);

sys/dev/drm/radeon/cypress_dpm.c

259

WREG32_P(MCLK_PWRMGT_CNTL, MPLL_PWRMGT_OFF, ~MPLL_PWRMGT_OFF);

sys/dev/drm/radeon/ni_dpm.c

1193

ni_pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL);

sys/dev/drm/radeon/r600_dpm.c

315

WREG32_P(MCLK_PWRMGT_CNTL, 0, ~MPLL_PWRMGT_OFF);

sys/dev/drm/radeon/r600_dpm.c

317

WREG32_P(MCLK_PWRMGT_CNTL, MPLL_PWRMGT_OFF, ~MPLL_PWRMGT_OFF);

sys/dev/drm/radeon/rv6xx_dpm.c

992

WREG32_P(MCLK_PWRMGT_CNTL, USE_DISPLAY_GAP, ~USE_DISPLAY_GAP);

sys/dev/drm/radeon/rv6xx_dpm.c

994

WREG32_P(MCLK_PWRMGT_CNTL, 0, ~USE_DISPLAY_GAP);

sys/dev/drm/radeon/rv740_dpm.c

313

RREG32(MCLK_PWRMGT_CNTL);

sys/dev/drm/radeon/rv770_dpm.c

1544

RREG32(MCLK_PWRMGT_CNTL);

sys/dev/drm/radeon/rv770_dpm.c

188

WREG32_P(MCLK_PWRMGT_CNTL, 0, ~MPLL_PWRMGT_OFF);

sys/dev/drm/radeon/rv770_dpm.c

206

WREG32_P(MCLK_PWRMGT_CNTL, MPLL_PWRMGT_OFF, ~MPLL_PWRMGT_OFF);

sys/dev/drm/radeon/si_dpm.c

3581

si_pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL);