sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

196

case LANE_COUNT_ONE:

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1189

link->verified_link_cap.lane_count = LANE_COUNT_ONE;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1243

return lane_count <= LANE_COUNT_ONE;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1257

return LANE_COUNT_ONE;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1258

case LANE_COUNT_ONE:

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1284

case LANE_COUNT_ONE:

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1342

LANE_COUNT_ONE;

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

1505

LANE_COUNT_ONE, LINK_RATE_LOW, LINK_SPREAD_DISABLED};

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

709

if (ln_count >= LANE_COUNT_ONE && !dpcd_lane_status[0].bits.CR_DONE_0)

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

483

DP_UDI_LANES, link_settings->lane_count - LANE_COUNT_ONE);

sys/dev/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

449

DP_UDI_LANES, link_settings->lane_count - LANE_COUNT_ONE);