sys/platform/pc64/icu/icu.c

115

outb(IO_ICU1 + ICU_IMR_OFFSET, 0xff);

sys/platform/pc64/icu/icu.c

153

irr1 = inb(IO_ICU1);

sys/platform/pc64/icu/icu.c

176

outb(IO_ICU1, 0x13);

sys/platform/pc64/icu/icu.c

177

outb(IO_ICU1 + 1, vec); /* start vector (unused) */

sys/platform/pc64/icu/icu.c

178

outb(IO_ICU1 + 1, 0x00); /* ignore slave */

sys/platform/pc64/icu/icu.c

179

outb(IO_ICU1 + 1, 0x03); /* auto EOI, 8086 */

sys/platform/pc64/icu/icu.c

180

outb(IO_ICU1 + 1, mask);

sys/platform/pc64/icu/icu.c

198

outb(IO_ICU1 + ICU_IMR_OFFSET, 0xff);

sys/platform/pc64/icu/icu.c

76

outb(IO_ICU1, 0x11); /* reset; program device, four bytes */

sys/platform/pc64/icu/icu.c

77

outb(IO_ICU1 + ICU_IMR_OFFSET, IDT_OFFSET);

sys/platform/pc64/icu/icu.c

79

outb(IO_ICU1 + ICU_IMR_OFFSET, 1 << ICU_IRQ_SLAVE);

sys/platform/pc64/icu/icu.c

81

outb(IO_ICU1 + ICU_IMR_OFFSET, auto_eoi | 1); /* 8086 mode */

sys/platform/pc64/icu/icu.c

83

outb(IO_ICU1 + ICU_IMR_OFFSET, 0xff); /* leave interrupts masked */

sys/platform/pc64/icu/icu.c

84

outb(IO_ICU1, 0x0a); /* default to IRR on read */

sys/platform/pc64/icu/icu.c

85

outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */