I915_WRITE - DragonflyBSD

sys/dev/drm/i915/i915_drv.c

1603

I915_WRITE(vgtif_reg(display_ready), VGT_DRV_DISPLAY_READY);

sys/dev/drm/i915/i915_drv.c

2731

I915_WRITE(GEN7_WR_WATERMARK, s->wr_watermark);

sys/dev/drm/i915/i915_drv.c

2732

I915_WRITE(GEN7_GFX_PRIO_CTRL, s->gfx_prio_ctrl);

sys/dev/drm/i915/i915_drv.c

2733

I915_WRITE(ARB_MODE, s->arb_mode | (0xffff << 16));

sys/dev/drm/i915/i915_drv.c

2734

I915_WRITE(GEN7_GFX_PEND_TLB0, s->gfx_pend_tlb0);

sys/dev/drm/i915/i915_drv.c

2735

I915_WRITE(GEN7_GFX_PEND_TLB1, s->gfx_pend_tlb1);

sys/dev/drm/i915/i915_drv.c

2738

I915_WRITE(GEN7_LRA_LIMITS(i), s->lra_limits[i]);

sys/dev/drm/i915/i915_drv.c

2740

I915_WRITE(GEN7_MEDIA_MAX_REQ_COUNT, s->media_max_req_count);

sys/dev/drm/i915/i915_drv.c

2741

I915_WRITE(GEN7_GFX_MAX_REQ_COUNT, s->gfx_max_req_count);

sys/dev/drm/i915/i915_drv.c

2743

I915_WRITE(RENDER_HWS_PGA_GEN7, s->render_hwsp);

sys/dev/drm/i915/i915_drv.c

2744

I915_WRITE(GAM_ECOCHK, s->ecochk);

sys/dev/drm/i915/i915_drv.c

2745

I915_WRITE(BSD_HWS_PGA_GEN7, s->bsd_hwsp);

sys/dev/drm/i915/i915_drv.c

2746

I915_WRITE(BLT_HWS_PGA_GEN7, s->blt_hwsp);

sys/dev/drm/i915/i915_drv.c

2748

I915_WRITE(GEN7_TLB_RD_ADDR, s->tlb_rd_addr);

sys/dev/drm/i915/i915_drv.c

2751

I915_WRITE(VLV_G3DCTL, s->g3dctl);

sys/dev/drm/i915/i915_drv.c

2752

I915_WRITE(VLV_GSCKGCTL, s->gsckgctl);

sys/dev/drm/i915/i915_drv.c

2753

I915_WRITE(GEN6_MBCTL, s->mbctl);

sys/dev/drm/i915/i915_drv.c

2756

I915_WRITE(GEN6_UCGCTL1, s->ucgctl1);

sys/dev/drm/i915/i915_drv.c

2757

I915_WRITE(GEN6_UCGCTL3, s->ucgctl3);

sys/dev/drm/i915/i915_drv.c

2758

I915_WRITE(GEN6_RCGCTL1, s->rcgctl1);

sys/dev/drm/i915/i915_drv.c

2759

I915_WRITE(GEN6_RCGCTL2, s->rcgctl2);

sys/dev/drm/i915/i915_drv.c

2760

I915_WRITE(GEN6_RSTCTL, s->rstctl);

sys/dev/drm/i915/i915_drv.c

2761

I915_WRITE(GEN7_MISCCPCTL, s->misccpctl);

sys/dev/drm/i915/i915_drv.c

2764

I915_WRITE(GEN6_GFXPAUSE, s->gfxpause);

sys/dev/drm/i915/i915_drv.c

2765

I915_WRITE(GEN6_RPDEUHWTC, s->rpdeuhwtc);

sys/dev/drm/i915/i915_drv.c

2766

I915_WRITE(GEN6_RPDEUC, s->rpdeuc);

sys/dev/drm/i915/i915_drv.c

2767

I915_WRITE(ECOBUS, s->ecobus);

sys/dev/drm/i915/i915_drv.c

2768

I915_WRITE(VLV_PWRDWNUPCTL, s->pwrdwnupctl);

sys/dev/drm/i915/i915_drv.c

2769

I915_WRITE(GEN6_RP_DOWN_TIMEOUT,s->rp_down_timeout);

sys/dev/drm/i915/i915_drv.c

2770

I915_WRITE(GEN6_RPDEUCSW, s->rp_deucsw);

sys/dev/drm/i915/i915_drv.c

2771

I915_WRITE(GEN6_RCUBMABDTMR, s->rcubmabdtmr);

sys/dev/drm/i915/i915_drv.c

2772

I915_WRITE(VLV_RCEDATA, s->rcedata);

sys/dev/drm/i915/i915_drv.c

2773

I915_WRITE(VLV_SPAREG2H, s->spare2gh);

sys/dev/drm/i915/i915_drv.c

2776

I915_WRITE(GTIMR, s->gt_imr);

sys/dev/drm/i915/i915_drv.c

2777

I915_WRITE(GTIER, s->gt_ier);

sys/dev/drm/i915/i915_drv.c

2778

I915_WRITE(GEN6_PMIMR, s->pm_imr);

sys/dev/drm/i915/i915_drv.c

2779

I915_WRITE(GEN6_PMIER, s->pm_ier);

sys/dev/drm/i915/i915_drv.c

2782

I915_WRITE(GEN7_GT_SCRATCH(i), s->gt_scratch[i]);

sys/dev/drm/i915/i915_drv.c

2785

I915_WRITE(TILECTL, s->tilectl);

sys/dev/drm/i915/i915_drv.c

2786

I915_WRITE(GTFIFOCTL, s->gt_fifoctl);

sys/dev/drm/i915/i915_drv.c

2795

I915_WRITE(VLV_GTLC_WAKE_CTRL, val);

sys/dev/drm/i915/i915_drv.c

2800

I915_WRITE(VLV_GTLC_SURVIVABILITY_REG, val);

sys/dev/drm/i915/i915_drv.c

2802

I915_WRITE(VLV_PMWGICZ, s->pmwgicz);

sys/dev/drm/i915/i915_drv.c

2805

I915_WRITE(VLV_GU_CTL0, s->gu_ctl0);

sys/dev/drm/i915/i915_drv.c

2806

I915_WRITE(VLV_GU_CTL1, s->gu_ctl1);

sys/dev/drm/i915/i915_drv.c

2807

I915_WRITE(VLV_PCBR, s->pcbr);

sys/dev/drm/i915/i915_drv.c

2808

I915_WRITE(VLV_GUNIT_CLOCK_GATE2, s->clock_gate_dis2);

sys/dev/drm/i915/i915_drv.c

2835

I915_WRITE(VLV_GTLC_SURVIVABILITY_REG, val);

sys/dev/drm/i915/i915_drv.c

2863

I915_WRITE(VLV_GTLC_WAKE_CTRL, val);

sys/dev/drm/i915/i915_drv.c

2903

I915_WRITE(VLV_GTLC_PW_STATUS, VLV_GTLC_ALLOWWAKEERR);

sys/dev/drm/i915/i915_gem.c

5626

I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) |

sys/dev/drm/i915/i915_gem.c

5632

I915_WRITE(TILECTL, I915_READ(TILECTL) | TILECTL_SWZCTL);

sys/dev/drm/i915/i915_gem.c

5634

I915_WRITE(ARB_MODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_SNB));

sys/dev/drm/i915/i915_gem.c

5636

I915_WRITE(ARB_MODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_IVB));

sys/dev/drm/i915/i915_gem.c

5638

I915_WRITE(GAMTARBMODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_BDW));

sys/dev/drm/i915/i915_gem.c

5645

I915_WRITE(RING_CTL(base), 0);

sys/dev/drm/i915/i915_gem.c

5646

I915_WRITE(RING_HEAD(base), 0);

sys/dev/drm/i915/i915_gem.c

5647

I915_WRITE(RING_TAIL(base), 0);

sys/dev/drm/i915/i915_gem.c

5648

I915_WRITE(RING_START(base), 0);

sys/dev/drm/i915/i915_gem.c

5697

I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));

sys/dev/drm/i915/i915_gem.c

5700

I915_WRITE(MI_PREDICATE_RESULT_2, IS_HSW_GT3(dev_priv) ?

sys/dev/drm/i915/i915_gem.c

5707

I915_WRITE(GEN7_MSG_CTL, temp);

sys/dev/drm/i915/i915_gem.c

5711

I915_WRITE(HSW_NDE_RSTWRN_OPT, temp);

sys/dev/drm/i915/i915_gem_fence_reg.c

107

I915_WRITE(fence_reg_lo, 0);

sys/dev/drm/i915/i915_gem_fence_reg.c

110

I915_WRITE(fence_reg_hi, upper_32_bits(val));

sys/dev/drm/i915/i915_gem_fence_reg.c

111

I915_WRITE(fence_reg_lo, lower_32_bits(val));

sys/dev/drm/i915/i915_gem_fence_reg.c

151

I915_WRITE(reg, val);

sys/dev/drm/i915/i915_gem_fence_reg.c

183

I915_WRITE(reg, val);

sys/dev/drm/i915/i915_gem_gtt.c

117

I915_WRITE(GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);

sys/dev/drm/i915/i915_gem_gtt.c

123

I915_WRITE(GEN8_GTCR, GEN8_GTCR_INVALIDATE);

sys/dev/drm/i915/i915_gem_gtt.c

1318

I915_WRITE(vgtif_reg(pdp[0].lo), lower_32_bits(daddr));

sys/dev/drm/i915/i915_gem_gtt.c

1319

I915_WRITE(vgtif_reg(pdp[0].hi), upper_32_bits(daddr));

sys/dev/drm/i915/i915_gem_gtt.c

1327

I915_WRITE(vgtif_reg(pdp[i].lo), lower_32_bits(daddr));

sys/dev/drm/i915/i915_gem_gtt.c

1328

I915_WRITE(vgtif_reg(pdp[i].hi), upper_32_bits(daddr));

sys/dev/drm/i915/i915_gem_gtt.c

1335

I915_WRITE(vgtif_reg(g2v_notify), msg);

sys/dev/drm/i915/i915_gem_gtt.c

1796

I915_WRITE(RING_MODE_GEN7(engine),

sys/dev/drm/i915/i915_gem_gtt.c

1808

I915_WRITE(GAC_ECO_BITS, ecobits | ECOBITS_PPGTT_CACHE64B);

sys/dev/drm/i915/i915_gem_gtt.c

1817

I915_WRITE(GAM_ECOCHK, ecochk);

sys/dev/drm/i915/i915_gem_gtt.c

1821

I915_WRITE(RING_MODE_GEN7(engine),

sys/dev/drm/i915/i915_gem_gtt.c

1831

I915_WRITE(GAC_ECO_BITS, ecobits | ECOBITS_SNB_BIT |

sys/dev/drm/i915/i915_gem_gtt.c

1835

I915_WRITE(GAB_CTL, gab_ctl | GAB_CTL_CONT_AFTER_PAGEFAULT);

sys/dev/drm/i915/i915_gem_gtt.c

1838

I915_WRITE(GAM_ECOCHK, ecochk | ECOCHK_SNB_BIT | ECOCHK_PPGTT_CACHE64B);

sys/dev/drm/i915/i915_gem_gtt.c

1840

I915_WRITE(GFX_MODE, _MASKED_BIT_ENABLE(GFX_PPGTT_ENABLE));

sys/dev/drm/i915/i915_gem_gtt.c

2222

I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_BDW);

sys/dev/drm/i915/i915_gem_gtt.c

2224

I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_CHV);

sys/dev/drm/i915/i915_gem_gtt.c

2226

I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_BXT);

sys/dev/drm/i915/i915_gem_gtt.c

2228

I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_SKL);

sys/dev/drm/i915/i915_gem_gtt.c

2243

I915_WRITE(GEN8_GAMW_ECO_DEV_RW_IA,

sys/dev/drm/i915/i915_gem_gtt.c

3218

I915_WRITE(GEN10_PAT_INDEX(i), ppat->entries[i].value);

sys/dev/drm/i915/i915_gem_gtt.c

3234

I915_WRITE(GEN8_PRIVATE_PAT_LO, lower_32_bits(pat));

sys/dev/drm/i915/i915_gem_gtt.c

3235

I915_WRITE(GEN8_PRIVATE_PAT_HI, upper_32_bits(pat));

sys/dev/drm/i915/i915_irq.c

136

I915_WRITE(GEN8_##type##_IMR(which), 0xffffffff); \

sys/dev/drm/i915/i915_irq.c

138

I915_WRITE(GEN8_##type##_IER(which), 0); \

sys/dev/drm/i915/i915_irq.c

139

I915_WRITE(GEN8_##type##_IIR(which), 0xffffffff); \

sys/dev/drm/i915/i915_irq.c

1393

I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE);

sys/dev/drm/i915/i915_irq.c

141

I915_WRITE(GEN8_##type##_IIR(which), 0xffffffff); \

sys/dev/drm/i915/i915_irq.c

1412

I915_WRITE(reg, GEN7_PARITY_ERROR_VALID | GEN7_L3CDERRST1_ENABLE);

sys/dev/drm/i915/i915_irq.c

1434

I915_WRITE(GEN7_MISCCPCTL, misccpctl);

sys/dev/drm/i915/i915_irq.c

146

I915_WRITE(type##IMR, 0xffffffff); \

sys/dev/drm/i915/i915_irq.c

148

I915_WRITE(type##IER, 0); \

sys/dev/drm/i915/i915_irq.c

149

I915_WRITE(type##IIR, 0xffffffff); \

sys/dev/drm/i915/i915_irq.c

151

I915_WRITE(type##IIR, 0xffffffff); \

sys/dev/drm/i915/i915_irq.c

178

I915_WRITE(reg, 0xffffffff);

sys/dev/drm/i915/i915_irq.c

180

I915_WRITE(reg, 0xffffffff);

sys/dev/drm/i915/i915_irq.c

1866

I915_WRITE(PIPESTAT(pipe),

sys/dev/drm/i915/i915_irq.c

1932

I915_WRITE(reg, pipe_stats[pipe]);

sys/dev/drm/i915/i915_irq.c

1933

I915_WRITE(reg, enable_mask);

sys/dev/drm/i915/i915_irq.c

202

I915_WRITE(GEN8_##type##_IER(which), (ier_val)); \

sys/dev/drm/i915/i915_irq.c

203

I915_WRITE(GEN8_##type##_IMR(which), (imr_val)); \

sys/dev/drm/i915/i915_irq.c

2055

I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);

sys/dev/drm/i915/i915_irq.c

209

I915_WRITE(type##IER, (ier_val)); \

sys/dev/drm/i915/i915_irq.c

210

I915_WRITE(type##IMR, (imr_val)); \

sys/dev/drm/i915/i915_irq.c

2138

I915_WRITE(VLV_MASTER_IER, 0);

sys/dev/drm/i915/i915_irq.c

2140

I915_WRITE(VLV_IER, 0);

sys/dev/drm/i915/i915_irq.c

2143

I915_WRITE(GTIIR, gt_iir);

sys/dev/drm/i915/i915_irq.c

2145

I915_WRITE(GEN6_PMIIR, pm_iir);

sys/dev/drm/i915/i915_irq.c

2163

I915_WRITE(VLV_IIR, iir);

sys/dev/drm/i915/i915_irq.c

2165

I915_WRITE(VLV_IER, ier);

sys/dev/drm/i915/i915_irq.c

2166

I915_WRITE(VLV_MASTER_IER, MASTER_INTERRUPT_ENABLE);

sys/dev/drm/i915/i915_irq.c

2224

I915_WRITE(GEN8_MASTER_IRQ, 0);

sys/dev/drm/i915/i915_irq.c

2226

I915_WRITE(VLV_IER, 0);

sys/dev/drm/i915/i915_irq.c

2247

I915_WRITE(VLV_IIR, iir);

sys/dev/drm/i915/i915_irq.c

2249

I915_WRITE(VLV_IER, ier);

sys/dev/drm/i915/i915_irq.c

2250

I915_WRITE(GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL);

sys/dev/drm/i915/i915_irq.c

2286

I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);

sys/dev/drm/i915/i915_irq.c

2365

I915_WRITE(GEN7_ERR_INT, err_int);

sys/dev/drm/i915/i915_irq.c

238

I915_WRITE(PORT_HOTPLUG_EN, val);

sys/dev/drm/i915/i915_irq.c

2380

I915_WRITE(SERR_INT, serr_int);

sys/dev/drm/i915/i915_irq.c

2429

I915_WRITE(SHOTPLUG_CTL_DDI, dig_hotplug_reg);

sys/dev/drm/i915/i915_irq.c

2441

I915_WRITE(SHOTPLUG_CTL_TC, dig_hotplug_reg);

sys/dev/drm/i915/i915_irq.c

2467

I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);

sys/dev/drm/i915/i915_irq.c

2478

I915_WRITE(PCH_PORT_HOTPLUG2, dig_hotplug_reg);

sys/dev/drm/i915/i915_irq.c

2499

I915_WRITE(DIGITAL_PORT_HOTPLUG_CNTRL, dig_hotplug_reg);

sys/dev/drm/i915/i915_irq.c

2547

I915_WRITE(SDEIIR, pch_iir);

sys/dev/drm/i915/i915_irq.c

2570

I915_WRITE(EDP_PSR_IIR, psr_iir);

sys/dev/drm/i915/i915_irq.c

2591

I915_WRITE(SDEIIR, pch_iir);

sys/dev/drm/i915/i915_irq.c

2618

I915_WRITE(DEIER, de_ier & ~DE_MASTER_IRQ_CONTROL);

sys/dev/drm/i915/i915_irq.c

2627

I915_WRITE(SDEIER, 0);

sys/dev/drm/i915/i915_irq.c

2634

I915_WRITE(GTIIR, gt_iir);

sys/dev/drm/i915/i915_irq.c

2644

I915_WRITE(DEIIR, de_iir);

sys/dev/drm/i915/i915_irq.c

2655

I915_WRITE(GEN6_PMIIR, pm_iir);

sys/dev/drm/i915/i915_irq.c

2661

I915_WRITE(DEIER, de_ier);

sys/dev/drm/i915/i915_irq.c

2663

I915_WRITE(SDEIER, sde_ier);

sys/dev/drm/i915/i915_irq.c

2678

I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);

sys/dev/drm/i915/i915_irq.c

2697

I915_WRITE(GEN11_TC_HOTPLUG_CTL, dig_hotplug_reg);

sys/dev/drm/i915/i915_irq.c

2708

I915_WRITE(GEN11_TBT_HOTPLUG_CTL, dig_hotplug_reg);

sys/dev/drm/i915/i915_irq.c

2733

I915_WRITE(GEN8_DE_MISC_IIR, iir);

sys/dev/drm/i915/i915_irq.c

2745

I915_WRITE(EDP_PSR_IIR, psr_iir);

sys/dev/drm/i915/i915_irq.c

2759

I915_WRITE(GEN11_DE_HPD_IIR, iir);

sys/dev/drm/i915/i915_irq.c

2773

I915_WRITE(GEN8_DE_PORT_IIR, iir);

sys/dev/drm/i915/i915_irq.c

2835

I915_WRITE(GEN8_DE_PIPE_IIR(pipe), iir);

sys/dev/drm/i915/i915_irq.c

2867

I915_WRITE(SDEIIR, iir);

sys/dev/drm/i915/i915_irq.c

3219

I915_WRITE(PGTBL_ER, I915_READ(PGTBL_ER));

sys/dev/drm/i915/i915_irq.c

322

I915_WRITE(DEIMR, dev_priv->irq_mask);

sys/dev/drm/i915/i915_irq.c

3222

I915_WRITE(IPEIR, I915_READ(IPEIR));

sys/dev/drm/i915/i915_irq.c

3224

I915_WRITE(IPEIR_I965, I915_READ(IPEIR_I965));

sys/dev/drm/i915/i915_irq.c

3226

I915_WRITE(EIR, I915_READ(EIR));

sys/dev/drm/i915/i915_irq.c

3234

I915_WRITE(EMR, I915_READ(EMR) | eir);

sys/dev/drm/i915/i915_irq.c

3235

I915_WRITE(IIR, I915_MASTER_ERROR_INTERRUPT);

sys/dev/drm/i915/i915_irq.c

3239

I915_WRITE(GEN8_RING_FAULT_REG,

sys/dev/drm/i915/i915_irq.c

3247

I915_WRITE(RING_FAULT_REG(engine),

sys/dev/drm/i915/i915_irq.c

346

I915_WRITE(GTIMR, dev_priv->gt_irq_mask);

sys/dev/drm/i915/i915_irq.c

3480

I915_WRITE(SERR_INT, 0xffffffff);

sys/dev/drm/i915/i915_irq.c

3499

I915_WRITE(SDEIER, 0xffffffff);

sys/dev/drm/i915/i915_irq.c

3513

I915_WRITE(DPINVGTT, DPINVGTT_STATUS_MASK_CHV);

sys/dev/drm/i915/i915_irq.c

3515

I915_WRITE(DPINVGTT, DPINVGTT_STATUS_MASK);

sys/dev/drm/i915/i915_irq.c

3518

I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));

sys/dev/drm/i915/i915_irq.c

3562

I915_WRITE(HWSTAM, 0xffffffff);

sys/dev/drm/i915/i915_irq.c

3566

I915_WRITE(GEN7_ERR_INT, 0xffffffff);

sys/dev/drm/i915/i915_irq.c

3569

I915_WRITE(EDP_PSR_IMR, 0xffffffff);

sys/dev/drm/i915/i915_irq.c

3570

I915_WRITE(EDP_PSR_IIR, 0xffffffff);

sys/dev/drm/i915/i915_irq.c

3582

I915_WRITE(VLV_MASTER_IER, 0);

sys/dev/drm/i915/i915_irq.c

3606

I915_WRITE(GEN8_MASTER_IRQ, 0);

sys/dev/drm/i915/i915_irq.c

3611

I915_WRITE(EDP_PSR_IMR, 0xffffffff);

sys/dev/drm/i915/i915_irq.c

3612

I915_WRITE(EDP_PSR_IIR, 0xffffffff);

sys/dev/drm/i915/i915_irq.c

3630

I915_WRITE(GEN11_RENDER_COPY_INTR_ENABLE, 0);

sys/dev/drm/i915/i915_irq.c

3631

I915_WRITE(GEN11_VCS_VECS_INTR_ENABLE, 0);

sys/dev/drm/i915/i915_irq.c

3634

I915_WRITE(GEN11_RCS0_RSVD_INTR_MASK, ~0);

sys/dev/drm/i915/i915_irq.c

3635

I915_WRITE(GEN11_BCS_RSVD_INTR_MASK, ~0);

sys/dev/drm/i915/i915_irq.c

3636

I915_WRITE(GEN11_VCS0_VCS1_INTR_MASK, ~0);

sys/dev/drm/i915/i915_irq.c

3637

I915_WRITE(GEN11_VCS2_VCS3_INTR_MASK, ~0);

sys/dev/drm/i915/i915_irq.c

3638

I915_WRITE(GEN11_VECS0_VECS1_INTR_MASK, ~0);

sys/dev/drm/i915/i915_irq.c

3640

I915_WRITE(GEN11_GPM_WGBOXPERF_INTR_ENABLE, 0);

sys/dev/drm/i915/i915_irq.c

3641

I915_WRITE(GEN11_GPM_WGBOXPERF_INTR_MASK, ~0);

sys/dev/drm/i915/i915_irq.c

3649

I915_WRITE(GEN11_GFX_MSTR_IRQ, 0);

sys/dev/drm/i915/i915_irq.c

3654

I915_WRITE(GEN11_DISPLAY_INT_CTL, 0);

sys/dev/drm/i915/i915_irq.c

3717

I915_WRITE(GEN8_MASTER_IRQ, 0);

sys/dev/drm/i915/i915_irq.c

3765

I915_WRITE(PCH_PORT_HOTPLUG, hotplug);

sys/dev/drm/i915/i915_irq.c

3792

I915_WRITE(SHOTPLUG_CTL_DDI, hotplug);

sys/dev/drm/i915/i915_irq.c

3799

I915_WRITE(SHOTPLUG_CTL_TC, hotplug);

sys/dev/drm/i915/i915_irq.c

3823

I915_WRITE(GEN11_TC_HOTPLUG_CTL, hotplug);

sys/dev/drm/i915/i915_irq.c

3830

I915_WRITE(GEN11_TBT_HOTPLUG_CTL, hotplug);

sys/dev/drm/i915/i915_irq.c

3843

I915_WRITE(GEN11_DE_HPD_IMR, val);

sys/dev/drm/i915/i915_irq.c

3861

I915_WRITE(SOUTH_CHICKEN1, val);

sys/dev/drm/i915/i915_irq.c

3870

I915_WRITE(PCH_PORT_HOTPLUG, hotplug);

sys/dev/drm/i915/i915_irq.c

3874

I915_WRITE(PCH_PORT_HOTPLUG2, hotplug);

sys/dev/drm/i915/i915_irq.c

3902

I915_WRITE(DIGITAL_PORT_HOTPLUG_CNTRL, hotplug);

sys/dev/drm/i915/i915_irq.c

3959

I915_WRITE(PCH_PORT_HOTPLUG, hotplug);

sys/dev/drm/i915/i915_irq.c

3995

I915_WRITE(SDEIMR, ~mask);

sys/dev/drm/i915/i915_irq.c

409

I915_WRITE(gen6_pm_imr(dev_priv), dev_priv->pm_imr);

sys/dev/drm/i915/i915_irq.c

4134

I915_WRITE(VLV_MASTER_IER, MASTER_INTERRUPT_ENABLE);

sys/dev/drm/i915/i915_irq.c

4252

I915_WRITE(GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL);

sys/dev/drm/i915/i915_irq.c

4265

I915_WRITE(GEN11_RENDER_COPY_INTR_ENABLE, irqs << 16 | irqs);

sys/dev/drm/i915/i915_irq.c

4266

I915_WRITE(GEN11_VCS_VECS_INTR_ENABLE, irqs << 16 | irqs);

sys/dev/drm/i915/i915_irq.c

4269

I915_WRITE(GEN11_RCS0_RSVD_INTR_MASK, ~(irqs << 16));

sys/dev/drm/i915/i915_irq.c

4270

I915_WRITE(GEN11_BCS_RSVD_INTR_MASK, ~(irqs << 16));

sys/dev/drm/i915/i915_irq.c

4271

I915_WRITE(GEN11_VCS0_VCS1_INTR_MASK, ~(irqs | irqs << 16));

sys/dev/drm/i915/i915_irq.c

4272

I915_WRITE(GEN11_VCS2_VCS3_INTR_MASK, ~(irqs | irqs << 16));

sys/dev/drm/i915/i915_irq.c

4273

I915_WRITE(GEN11_VECS0_VECS1_INTR_MASK, ~(irqs | irqs << 16));

sys/dev/drm/i915/i915_irq.c

4281

I915_WRITE(GEN11_GPM_WGBOXPERF_INTR_ENABLE, 0);

sys/dev/drm/i915/i915_irq.c

4282

I915_WRITE(GEN11_GPM_WGBOXPERF_INTR_MASK, ~0);

sys/dev/drm/i915/i915_irq.c

4291

I915_WRITE(SDEIER, 0xffffffff);

sys/dev/drm/i915/i915_irq.c

4295

I915_WRITE(SDEIMR, ~mask);

sys/dev/drm/i915/i915_irq.c

4313

I915_WRITE(GEN11_DISPLAY_INT_CTL, GEN11_DISPLAY_IRQ_ENABLE);

sys/dev/drm/i915/i915_irq.c

4315

I915_WRITE(GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ);

sys/dev/drm/i915/i915_irq.c

4332

I915_WRITE(GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL);

sys/dev/drm/i915/i915_irq.c

441

I915_WRITE(reg, reset_mask);

sys/dev/drm/i915/i915_irq.c

442

I915_WRITE(reg, reset_mask);

sys/dev/drm/i915/i915_irq.c

4426

I915_WRITE(EIR, *eir);

sys/dev/drm/i915/i915_irq.c

4443

I915_WRITE(EMR, 0xffffffff);

sys/dev/drm/i915/i915_irq.c

4444

I915_WRITE(EMR, emr | *eir_stuck);

sys/dev/drm/i915/i915_irq.c

4508

I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));

sys/dev/drm/i915/i915_irq.c

451

I915_WRITE(gen6_pm_ier(dev_priv), dev_priv->pm_ier);

sys/dev/drm/i915/i915_irq.c

4513

I915_WRITE(HWSTAM, 0xffffffff);

sys/dev/drm/i915/i915_irq.c

4523

I915_WRITE(EMR, ~(I915_ERROR_PAGE_TABLE |

sys/dev/drm/i915/i915_irq.c

4596

I915_WRITE(IIR, iir);

sys/dev/drm/i915/i915_irq.c

462

I915_WRITE(gen6_pm_ier(dev_priv), dev_priv->pm_ier);

sys/dev/drm/i915/i915_irq.c

4620

I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));

sys/dev/drm/i915/i915_irq.c

4624

I915_WRITE(HWSTAM, 0xffffffff);

sys/dev/drm/i915/i915_irq.c

4648

I915_WRITE(EMR, error_mask);

sys/dev/drm/i915/i915_irq.c

4743

I915_WRITE(IIR, iir);

sys/dev/drm/i915/i915_irq.c

517

I915_WRITE(GEN6_PMINTRMSK, gen6_sanitize_rps_pm_mask(dev_priv, ~0u));

sys/dev/drm/i915/i915_irq.c

601

I915_WRITE(GEN8_DE_PORT_IMR, new_val);

sys/dev/drm/i915/i915_irq.c

633

I915_WRITE(GEN8_DE_PIPE_IMR(pipe), dev_priv->de_irq_mask[pipe]);

sys/dev/drm/i915/i915_irq.c

659

I915_WRITE(SDEIMR, sdeimr);

sys/dev/drm/i915/i915_irq.c

723

I915_WRITE(reg, enable_mask | status_mask);

sys/dev/drm/i915/i915_irq.c

746

I915_WRITE(reg, enable_mask | status_mask);

sys/dev/drm/i915/i915_perf.c

1043

I915_WRITE(GEN7_OASTATUS2,

sys/dev/drm/i915/i915_perf.c

1394

I915_WRITE(GEN7_OASTATUS2,

sys/dev/drm/i915/i915_perf.c

1398

I915_WRITE(GEN7_OABUFFER, gtt_offset);

sys/dev/drm/i915/i915_perf.c

1400

I915_WRITE(GEN7_OASTATUS1, gtt_offset | OABUFFER_SIZE_16M); /* tail */

sys/dev/drm/i915/i915_perf.c

1440

I915_WRITE(GEN8_OASTATUS, 0);

sys/dev/drm/i915/i915_perf.c

1441

I915_WRITE(GEN8_OAHEADPTR, gtt_offset);

sys/dev/drm/i915/i915_perf.c

1444

I915_WRITE(GEN8_OABUFFER_UDW, 0);

sys/dev/drm/i915/i915_perf.c

1454

I915_WRITE(GEN8_OABUFFER, gtt_offset |

sys/dev/drm/i915/i915_perf.c

1456

I915_WRITE(GEN8_OATAILPTR, gtt_offset & GEN8_OATAILPTR_MASK);

sys/dev/drm/i915/i915_perf.c

1565

I915_WRITE(reg->addr, reg->value);

sys/dev/drm/i915/i915_perf.c

1581

I915_WRITE(GEN7_MISCCPCTL, (I915_READ(GEN7_MISCCPCTL) &

sys/dev/drm/i915/i915_perf.c

1583

I915_WRITE(GEN6_UCGCTL1, (I915_READ(GEN6_UCGCTL1) |

sys/dev/drm/i915/i915_perf.c

1619

I915_WRITE(GEN6_UCGCTL1, (I915_READ(GEN6_UCGCTL1) &

sys/dev/drm/i915/i915_perf.c

1621

I915_WRITE(GEN7_MISCCPCTL, (I915_READ(GEN7_MISCCPCTL) |

sys/dev/drm/i915/i915_perf.c

1624

I915_WRITE(GDT_CHICKEN_BITS, (I915_READ(GDT_CHICKEN_BITS) &

sys/dev/drm/i915/i915_perf.c

1802

I915_WRITE(GEN8_OA_DEBUG,

sys/dev/drm/i915/i915_perf.c

1829

I915_WRITE(GDT_CHICKEN_BITS, (I915_READ(GDT_CHICKEN_BITS) &

sys/dev/drm/i915/i915_perf.c

1839

I915_WRITE(RPM_CONFIG1,

sys/dev/drm/i915/i915_perf.c

1863

I915_WRITE(GEN7_OACONTROL,

sys/dev/drm/i915/i915_perf.c

1893

I915_WRITE(GEN8_OACONTROL, (report_format <<

sys/dev/drm/i915/i915_perf.c

1921

I915_WRITE(GEN7_OACONTROL, 0);

sys/dev/drm/i915/i915_perf.c

1930

I915_WRITE(GEN8_OACONTROL, 0);

sys/dev/drm/i915/i915_perf.c

830

I915_WRITE(GEN8_OAHEADPTR, head & GEN8_OAHEADPTR_MASK);

sys/dev/drm/i915/i915_perf.c

911

I915_WRITE(GEN8_OASTATUS,

sys/dev/drm/i915/i915_suspend.c

118

I915_WRITE(CACHE_MODE_0, dev_priv->regfile.saveCACHE_MODE_0 |

sys/dev/drm/i915/i915_suspend.c

122

I915_WRITE(MI_ARB_STATE, dev_priv->regfile.saveMI_ARB_STATE | 0xffff0000);

sys/dev/drm/i915/i915_suspend.c

127

I915_WRITE(SWF0(i), dev_priv->regfile.saveSWF0[i]);

sys/dev/drm/i915/i915_suspend.c

128

I915_WRITE(SWF1(i), dev_priv->regfile.saveSWF1[i]);

sys/dev/drm/i915/i915_suspend.c

131

I915_WRITE(SWF3(i), dev_priv->regfile.saveSWF3[i]);

sys/dev/drm/i915/i915_suspend.c

134

I915_WRITE(SWF1(i), dev_priv->regfile.saveSWF1[i]);

sys/dev/drm/i915/i915_suspend.c

137

I915_WRITE(SWF0(i), dev_priv->regfile.saveSWF0[i]);

sys/dev/drm/i915/i915_suspend.c

138

I915_WRITE(SWF1(i), dev_priv->regfile.saveSWF1[i]);

sys/dev/drm/i915/i915_suspend.c

141

I915_WRITE(SWF3(i), dev_priv->regfile.saveSWF3[i]);

sys/dev/drm/i915/i915_suspend.c

47

I915_WRITE(DSPARB, dev_priv->regfile.saveDSPARB);

sys/dev/drm/i915/i915_suspend.c

54

I915_WRITE(FBC_CONTROL, dev_priv->regfile.saveFBC_CONTROL);

sys/dev/drm/i915/icl_dsi.c

104

I915_WRITE(ICL_PORT_CL_DW10(port), tmp | lane_mask);

sys/dev/drm/i915/icl_dsi.c

45

I915_WRITE(ICL_DSI_ESC_CLK_DIV(port),

sys/dev/drm/i915/icl_dsi.c

51

I915_WRITE(ICL_DPHY_ESC_CLK_DIV(port),

sys/dev/drm/i915/icl_dsi.c

67

I915_WRITE(ICL_DSI_IO_MODECTL(port), tmp);

sys/dev/drm/i915/intel_audio.c

245

I915_WRITE(reg_elda, tmp);

sys/dev/drm/i915/intel_audio.c

272

I915_WRITE(G4X_AUD_CNTL_ST, tmp);

sys/dev/drm/i915/intel_audio.c

303

I915_WRITE(G4X_AUD_CNTL_ST, tmp);

sys/dev/drm/i915/intel_audio.c

308

I915_WRITE(G4X_HDMIW_HDMIEDID, *((const u32 *)eld + i));

sys/dev/drm/i915/intel_audio.c

312

I915_WRITE(G4X_AUD_CNTL_ST, tmp);

sys/dev/drm/i915/intel_audio.c

347

I915_WRITE(HSW_AUD_CFG(pipe), tmp);

sys/dev/drm/i915/intel_audio.c

360

I915_WRITE(HSW_AUD_M_CTS_ENABLE(pipe), tmp);

sys/dev/drm/i915/intel_audio.c

394

I915_WRITE(HSW_AUD_CFG(pipe), tmp);

sys/dev/drm/i915/intel_audio.c

403

I915_WRITE(HSW_AUD_M_CTS_ENABLE(pipe), tmp);

sys/dev/drm/i915/intel_audio.c

437

I915_WRITE(HSW_AUD_CFG(pipe), tmp);

sys/dev/drm/i915/intel_audio.c

443

I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);

sys/dev/drm/i915/intel_audio.c

469

I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);

sys/dev/drm/i915/intel_audio.c

481

I915_WRITE(HSW_AUD_DIP_ELD_CTRL(pipe), tmp);

sys/dev/drm/i915/intel_audio.c

486

I915_WRITE(HSW_AUD_EDID_DATA(pipe), *((const u32 *)eld + i));

sys/dev/drm/i915/intel_audio.c

491

I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);

sys/dev/drm/i915/intel_audio.c

535

I915_WRITE(aud_config, tmp);

sys/dev/drm/i915/intel_audio.c

542

I915_WRITE(aud_cntrl_st2, tmp);

sys/dev/drm/i915/intel_audio.c

595

I915_WRITE(aud_cntrl_st2, tmp);

sys/dev/drm/i915/intel_audio.c

600

I915_WRITE(aud_cntl_st, tmp);

sys/dev/drm/i915/intel_audio.c

605

I915_WRITE(hdmiw_hdmiedid, *((const u32 *)eld + i));

sys/dev/drm/i915/intel_audio.c

610

I915_WRITE(aud_cntrl_st2, tmp);

sys/dev/drm/i915/intel_audio.c

621

I915_WRITE(aud_config, tmp);

sys/dev/drm/i915/intel_audio.c

773

I915_WRITE(HSW_AUD_CHICKENBIT, tmp);

sys/dev/drm/i915/intel_audio.c

779

I915_WRITE(HSW_AUD_CHICKENBIT, tmp);

sys/dev/drm/i915/intel_cdclk.c

1050

I915_WRITE(CDCLK_CTL, cdclk_ctl);

sys/dev/drm/i915/intel_cdclk.c

1055

I915_WRITE(CDCLK_CTL, cdclk_ctl);

sys/dev/drm/i915/intel_cdclk.c

1063

I915_WRITE(CDCLK_CTL, cdclk_ctl);

sys/dev/drm/i915/intel_cdclk.c

1066

I915_WRITE(CDCLK_CTL, cdclk_ctl);

sys/dev/drm/i915/intel_cdclk.c

1070

I915_WRITE(CDCLK_CTL, cdclk_ctl);

sys/dev/drm/i915/intel_cdclk.c

1321

I915_WRITE(BXT_DE_PLL_ENABLE, 0);

sys/dev/drm/i915/intel_cdclk.c

1340

I915_WRITE(BXT_DE_PLL_CTL, val);

sys/dev/drm/i915/intel_cdclk.c

1342

I915_WRITE(BXT_DE_PLL_ENABLE, BXT_DE_PLL_PLL_ENABLE);

sys/dev/drm/i915/intel_cdclk.c

1420

I915_WRITE(CDCLK_CTL, val);

sys/dev/drm/i915/intel_cdclk.c

1636

I915_WRITE(BXT_DE_PLL_ENABLE, val);

sys/dev/drm/i915/intel_cdclk.c

1651

I915_WRITE(BXT_DE_PLL_ENABLE, val);

sys/dev/drm/i915/intel_cdclk.c

1654

I915_WRITE(BXT_DE_PLL_ENABLE, val);

sys/dev/drm/i915/intel_cdclk.c

1710

I915_WRITE(CDCLK_CTL, val);

sys/dev/drm/i915/intel_cdclk.c

1873

I915_WRITE(CDCLK_CTL, ICL_CDCLK_CD2X_PIPE_NONE |

sys/dev/drm/i915/intel_cdclk.c

2644

I915_WRITE(GMBUSFREQ_VLV,

sys/dev/drm/i915/intel_cdclk.c

2668

I915_WRITE(PCH_RAWCLK_FREQ, rawclk);

sys/dev/drm/i915/intel_cdclk.c

2692

I915_WRITE(PCH_RAWCLK_FREQ, rawclk);

sys/dev/drm/i915/intel_cdclk.c

505

I915_WRITE(GCI_CONTROL, VGA_FAST_MODE_DISABLE |

sys/dev/drm/i915/intel_cdclk.c

508

I915_WRITE(GCI_CONTROL, VGA_FAST_MODE_DISABLE |

sys/dev/drm/i915/intel_cdclk.c

723

I915_WRITE(LCPLL_CTL, val);

sys/dev/drm/i915/intel_cdclk.c

754

I915_WRITE(LCPLL_CTL, val);

sys/dev/drm/i915/intel_cdclk.c

758

I915_WRITE(LCPLL_CTL, val);

sys/dev/drm/i915/intel_cdclk.c

769

I915_WRITE(CDCLK_FREQ, DIV_ROUND_CLOSEST(cdclk, 1000) - 1);

sys/dev/drm/i915/intel_cdclk.c

960

I915_WRITE(DPLL_CTRL1, val);

sys/dev/drm/i915/intel_cdclk.c

963

I915_WRITE(LCPLL1_CTL, I915_READ(LCPLL1_CTL) | LCPLL_PLL_ENABLE);

sys/dev/drm/i915/intel_cdclk.c

978

I915_WRITE(LCPLL1_CTL, I915_READ(LCPLL1_CTL) & ~LCPLL_PLL_ENABLE);

sys/dev/drm/i915/intel_color.c

116

I915_WRITE(PIPE_CSC_PREOFF_HI(pipe), 0);

sys/dev/drm/i915/intel_color.c

117

I915_WRITE(PIPE_CSC_PREOFF_ME(pipe), 0);

sys/dev/drm/i915/intel_color.c

118

I915_WRITE(PIPE_CSC_PREOFF_LO(pipe), 0);

sys/dev/drm/i915/intel_color.c

120

I915_WRITE(PIPE_CSC_COEFF_RU_GU(pipe), CSC_RGB_TO_YUV_RU_GU);

sys/dev/drm/i915/intel_color.c

121

I915_WRITE(PIPE_CSC_COEFF_BU(pipe), CSC_RGB_TO_YUV_BU);

sys/dev/drm/i915/intel_color.c

123

I915_WRITE(PIPE_CSC_COEFF_RY_GY(pipe), CSC_RGB_TO_YUV_RY_GY);

sys/dev/drm/i915/intel_color.c

124

I915_WRITE(PIPE_CSC_COEFF_BY(pipe), CSC_RGB_TO_YUV_BY);

sys/dev/drm/i915/intel_color.c

126

I915_WRITE(PIPE_CSC_COEFF_RV_GV(pipe), CSC_RGB_TO_YUV_RV_GV);

sys/dev/drm/i915/intel_color.c

127

I915_WRITE(PIPE_CSC_COEFF_BV(pipe), CSC_RGB_TO_YUV_BV);

sys/dev/drm/i915/intel_color.c

129

I915_WRITE(PIPE_CSC_POSTOFF_HI(pipe), POSTOFF_RGB_TO_YUV_HI);

sys/dev/drm/i915/intel_color.c

130

I915_WRITE(PIPE_CSC_POSTOFF_ME(pipe), POSTOFF_RGB_TO_YUV_ME);

sys/dev/drm/i915/intel_color.c

131

I915_WRITE(PIPE_CSC_POSTOFF_LO(pipe), POSTOFF_RGB_TO_YUV_LO);

sys/dev/drm/i915/intel_color.c

132

I915_WRITE(PIPE_CSC_MODE(pipe), 0);

sys/dev/drm/i915/intel_color.c

218

I915_WRITE(PIPE_CSC_COEFF_RY_GY(pipe), coeffs[0] << 16 | coeffs[1]);

sys/dev/drm/i915/intel_color.c

219

I915_WRITE(PIPE_CSC_COEFF_BY(pipe), coeffs[2] << 16);

sys/dev/drm/i915/intel_color.c

221

I915_WRITE(PIPE_CSC_COEFF_RU_GU(pipe), coeffs[3] << 16 | coeffs[4]);

sys/dev/drm/i915/intel_color.c

222

I915_WRITE(PIPE_CSC_COEFF_BU(pipe), coeffs[5] << 16);

sys/dev/drm/i915/intel_color.c

224

I915_WRITE(PIPE_CSC_COEFF_RV_GV(pipe), coeffs[6] << 16 | coeffs[7]);

sys/dev/drm/i915/intel_color.c

225

I915_WRITE(PIPE_CSC_COEFF_BV(pipe), coeffs[8] << 16);

sys/dev/drm/i915/intel_color.c

227

I915_WRITE(PIPE_CSC_PREOFF_HI(pipe), 0);

sys/dev/drm/i915/intel_color.c

228

I915_WRITE(PIPE_CSC_PREOFF_ME(pipe), 0);

sys/dev/drm/i915/intel_color.c

229

I915_WRITE(PIPE_CSC_PREOFF_LO(pipe), 0);

sys/dev/drm/i915/intel_color.c

237

I915_WRITE(PIPE_CSC_POSTOFF_HI(pipe), postoff);

sys/dev/drm/i915/intel_color.c

238

I915_WRITE(PIPE_CSC_POSTOFF_ME(pipe), postoff);

sys/dev/drm/i915/intel_color.c

239

I915_WRITE(PIPE_CSC_POSTOFF_LO(pipe), postoff);

sys/dev/drm/i915/intel_color.c

241

I915_WRITE(PIPE_CSC_MODE(pipe), 0);

sys/dev/drm/i915/intel_color.c

248

I915_WRITE(PIPE_CSC_MODE(pipe), mode);

sys/dev/drm/i915/intel_color.c

284

I915_WRITE(CGM_PIPE_CSC_COEFF01(pipe),

sys/dev/drm/i915/intel_color.c

286

I915_WRITE(CGM_PIPE_CSC_COEFF23(pipe),

sys/dev/drm/i915/intel_color.c

288

I915_WRITE(CGM_PIPE_CSC_COEFF45(pipe),

sys/dev/drm/i915/intel_color.c

290

I915_WRITE(CGM_PIPE_CSC_COEFF67(pipe),

sys/dev/drm/i915/intel_color.c

292

I915_WRITE(CGM_PIPE_CSC_COEFF8(pipe), coeffs[8]);

sys/dev/drm/i915/intel_color.c

300

I915_WRITE(CGM_PIPE_MODE(pipe), mode);

sys/dev/drm/i915/intel_color.c

339

I915_WRITE(PALETTE(pipe, i), word);

sys/dev/drm/i915/intel_color.c

341

I915_WRITE(LGC_PALETTE(pipe, i), word);

sys/dev/drm/i915/intel_color.c

348

I915_WRITE(PALETTE(pipe, i), word);

sys/dev/drm/i915/intel_color.c

350

I915_WRITE(LGC_PALETTE(pipe, i), word);

sys/dev/drm/i915/intel_color.c

383

I915_WRITE(GAMMA_MODE(intel_crtc->pipe), GAMMA_MODE_MODE_8BIT);

sys/dev/drm/i915/intel_color.c

397

I915_WRITE(PREC_PAL_INDEX(pipe),

sys/dev/drm/i915/intel_color.c

409

I915_WRITE(PREC_PAL_DATA(pipe), word);

sys/dev/drm/i915/intel_color.c

415

I915_WRITE(PREC_PAL_DATA(pipe),

sys/dev/drm/i915/intel_color.c

429

I915_WRITE(PREC_PAL_INDEX(pipe),

sys/dev/drm/i915/intel_color.c

443

I915_WRITE(PREC_PAL_DATA(pipe), word);

sys/dev/drm/i915/intel_color.c

448

I915_WRITE(PREC_PAL_GC_MAX(pipe, 0),

sys/dev/drm/i915/intel_color.c

450

I915_WRITE(PREC_PAL_GC_MAX(pipe, 1),

sys/dev/drm/i915/intel_color.c

452

I915_WRITE(PREC_PAL_GC_MAX(pipe, 2),

sys/dev/drm/i915/intel_color.c

458

I915_WRITE(PREC_PAL_DATA(pipe),

sys/dev/drm/i915/intel_color.c

462

I915_WRITE(PREC_PAL_GC_MAX(pipe, 0), (1 << 16) - 1);

sys/dev/drm/i915/intel_color.c

463

I915_WRITE(PREC_PAL_GC_MAX(pipe, 1), (1 << 16) - 1);

sys/dev/drm/i915/intel_color.c

464

I915_WRITE(PREC_PAL_GC_MAX(pipe, 2), (1 << 16) - 1);

sys/dev/drm/i915/intel_color.c

485

I915_WRITE(GAMMA_MODE(pipe), GAMMA_MODE_MODE_SPLIT);

sys/dev/drm/i915/intel_color.c

492

I915_WRITE(PREC_PAL_INDEX(pipe), 0);

sys/dev/drm/i915/intel_color.c

507

I915_WRITE(PRE_CSC_GAMC_INDEX(pipe), 0);

sys/dev/drm/i915/intel_color.c

508

I915_WRITE(PRE_CSC_GAMC_INDEX(pipe), PRE_CSC_GAMC_AUTO_INCREMENT);

sys/dev/drm/i915/intel_color.c

517

I915_WRITE(PRE_CSC_GAMC_DATA(pipe), v);

sys/dev/drm/i915/intel_color.c

522

I915_WRITE(PRE_CSC_GAMC_DATA(pipe), (1 << 16));

sys/dev/drm/i915/intel_color.c

543

I915_WRITE(GAMMA_MODE(pipe), GAMMA_MODE_MODE_10BIT);

sys/dev/drm/i915/intel_color.c

559

I915_WRITE(CGM_PIPE_MODE(pipe),

sys/dev/drm/i915/intel_color.c

576

I915_WRITE(CGM_PIPE_DEGAMMA(pipe, i, 0), word0);

sys/dev/drm/i915/intel_color.c

577

I915_WRITE(CGM_PIPE_DEGAMMA(pipe, i, 1), word1);

sys/dev/drm/i915/intel_color.c

591

I915_WRITE(CGM_PIPE_GAMMA(pipe, i, 0), word0);

sys/dev/drm/i915/intel_color.c

592

I915_WRITE(CGM_PIPE_GAMMA(pipe, i, 1), word1);

sys/dev/drm/i915/intel_color.c

596

I915_WRITE(CGM_PIPE_MODE(pipe),

sys/dev/drm/i915/intel_crt.c

178

I915_WRITE(BCLRPAT(crtc->pipe), 0);

sys/dev/drm/i915/intel_crt.c

195

I915_WRITE(crt->adpa_reg, adpa);

sys/dev/drm/i915/intel_crt.c

431

I915_WRITE(crt->adpa_reg, adpa);

sys/dev/drm/i915/intel_crt.c

440

I915_WRITE(crt->adpa_reg, save_adpa);

sys/dev/drm/i915/intel_crt.c

485

I915_WRITE(crt->adpa_reg, adpa);

sys/dev/drm/i915/intel_crt.c

492

I915_WRITE(crt->adpa_reg, save_adpa);

sys/dev/drm/i915/intel_crt.c

551

I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);

sys/dev/drm/i915/intel_crt.c

664

I915_WRITE(bclrpat_reg, 0x500050);

sys/dev/drm/i915/intel_crt.c

668

I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);

sys/dev/drm/i915/intel_crt.c

678

I915_WRITE(pipeconf_reg, pipeconf);

sys/dev/drm/i915/intel_crt.c

692

I915_WRITE(vblank_reg,

sys/dev/drm/i915/intel_crt.c

725

I915_WRITE(vblank_reg, vblank);

sys/dev/drm/i915/intel_crt.c

738

I915_WRITE(bclrpat_reg, save_bclrpat);

sys/dev/drm/i915/intel_crt.c

895

I915_WRITE(crt->adpa_reg, adpa);

sys/dev/drm/i915/intel_crt.c

953

I915_WRITE(adpa_reg, adpa | ADPA_DAC_ENABLE |

sys/dev/drm/i915/intel_crt.c

957

I915_WRITE(adpa_reg, adpa);

sys/dev/drm/i915/intel_csr.c

231

I915_WRITE(DC_STATE_DEBUG, val);

sys/dev/drm/i915/intel_csr.c

270

I915_WRITE(dev_priv->csr.mmioaddr[i],

sys/dev/drm/i915/intel_ddi.c

1021

I915_WRITE(DDI_BUF_TRANS_LO(port, 9),

sys/dev/drm/i915/intel_ddi.c

1023

I915_WRITE(DDI_BUF_TRANS_HI(port, 9),

sys/dev/drm/i915/intel_ddi.c

1127

I915_WRITE(FDI_RX_MISC(PIPE_A), FDI_RX_PWRDN_LANE1_VAL(2) |

sys/dev/drm/i915/intel_ddi.c

1135

I915_WRITE(FDI_RX_CTL(PIPE_A), rx_ctl_val);

sys/dev/drm/i915/intel_ddi.c

1141

I915_WRITE(FDI_RX_CTL(PIPE_A), rx_ctl_val);

sys/dev/drm/i915/intel_ddi.c

1145

I915_WRITE(PORT_CLK_SEL(PORT_E), ddi_pll_sel);

sys/dev/drm/i915/intel_ddi.c

1152

I915_WRITE(DP_TP_CTL(PORT_E),

sys/dev/drm/i915/intel_ddi.c

1162

I915_WRITE(DDI_BUF_CTL(PORT_E),

sys/dev/drm/i915/intel_ddi.c

1171

I915_WRITE(FDI_RX_TUSIZE1(PIPE_A), TU_SIZE(64));

sys/dev/drm/i915/intel_ddi.c

1175

I915_WRITE(FDI_RX_CTL(PIPE_A), rx_ctl_val);

sys/dev/drm/i915/intel_ddi.c

1184

I915_WRITE(FDI_RX_MISC(PIPE_A), temp);

sys/dev/drm/i915/intel_ddi.c

1206

I915_WRITE(FDI_RX_CTL(PIPE_A), rx_ctl_val);

sys/dev/drm/i915/intel_ddi.c

1211

I915_WRITE(DDI_BUF_CTL(PORT_E), temp);

sys/dev/drm/i915/intel_ddi.c

1218

I915_WRITE(DP_TP_CTL(PORT_E), temp);

sys/dev/drm/i915/intel_ddi.c

1227

I915_WRITE(FDI_RX_MISC(PIPE_A), temp);

sys/dev/drm/i915/intel_ddi.c

1232

I915_WRITE(DP_TP_CTL(PORT_E),

sys/dev/drm/i915/intel_ddi.c

1787

I915_WRITE(TRANS_MSA_MISC(cpu_transcoder), temp);

sys/dev/drm/i915/intel_ddi.c

1803

I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);

sys/dev/drm/i915/intel_ddi.c

1889

I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);

sys/dev/drm/i915/intel_ddi.c

1902

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_ddi.c

1935

I915_WRITE(TRANS_DDI_FUNC_CTL(pipe), tmp);

sys/dev/drm/i915/intel_ddi.c

2132

I915_WRITE(TRANS_CLK_SEL(cpu_transcoder),

sys/dev/drm/i915/intel_ddi.c

2142

I915_WRITE(TRANS_CLK_SEL(cpu_transcoder),

sys/dev/drm/i915/intel_ddi.c

2157

I915_WRITE(DISPIO_CR_TX_BMU_CR0, tmp);

sys/dev/drm/i915/intel_ddi.c

2314

I915_WRITE(CNL_PORT_TX_DW5_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2324

I915_WRITE(CNL_PORT_TX_DW2_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2335

I915_WRITE(CNL_PORT_TX_DW4_LN(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2344

I915_WRITE(CNL_PORT_TX_DW5_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2350

I915_WRITE(CNL_PORT_TX_DW7_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2381

I915_WRITE(CNL_PORT_PCS_DW1_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2398

I915_WRITE(CNL_PORT_TX_DW4_LN(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2404

I915_WRITE(CNL_PORT_CL1CM_DW5, val);

sys/dev/drm/i915/intel_ddi.c

2409

I915_WRITE(CNL_PORT_TX_DW5_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2417

I915_WRITE(CNL_PORT_TX_DW5_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2441

I915_WRITE(ICL_PORT_TX_DW5_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2455

I915_WRITE(ICL_PORT_TX_DW5_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2465

I915_WRITE(ICL_PORT_TX_DW2_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2474

I915_WRITE(ICL_PORT_TX_DW4_LN(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2509

I915_WRITE(ICL_PORT_PCS_DW1_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2526

I915_WRITE(ICL_PORT_TX_DW4_LN(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2532

I915_WRITE(ICL_PORT_CL_DW5(port), val);

sys/dev/drm/i915/intel_ddi.c

2537

I915_WRITE(ICL_PORT_TX_DW5_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2545

I915_WRITE(ICL_PORT_TX_DW5_GRP(port), val);

sys/dev/drm/i915/intel_ddi.c

2571

I915_WRITE(MG_TX1_LINK_PARAMS(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2575

I915_WRITE(MG_TX2_LINK_PARAMS(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2584

I915_WRITE(MG_TX1_SWINGCTRL(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2590

I915_WRITE(MG_TX2_SWINGCTRL(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2603

I915_WRITE(MG_TX1_DRVCTRL(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2613

I915_WRITE(MG_TX2_DRVCTRL(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2629

I915_WRITE(MG_CLKHUB(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2642

I915_WRITE(MG_TX1_DCC(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2652

I915_WRITE(MG_TX2_DCC(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2659

I915_WRITE(MG_TX1_PISO_READLOAD(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2663

I915_WRITE(MG_TX2_PISO_READLOAD(port, ln), val);

sys/dev/drm/i915/intel_ddi.c

2779

I915_WRITE(DPCLKA_CFGCR0_ICL, val);

sys/dev/drm/i915/intel_ddi.c

2784

I915_WRITE(DPCLKA_CFGCR0_ICL, val);

sys/dev/drm/i915/intel_ddi.c

2809

I915_WRITE(DPCLKA_CFGCR0_ICL,

sys/dev/drm/i915/intel_ddi.c

2830

I915_WRITE(DDI_CLK_SEL(port),

sys/dev/drm/i915/intel_ddi.c

2837

I915_WRITE(DPCLKA_CFGCR0, val);

sys/dev/drm/i915/intel_ddi.c

2846

I915_WRITE(DPCLKA_CFGCR0, val);

sys/dev/drm/i915/intel_ddi.c

2856

I915_WRITE(DPLL_CTRL2, val);

sys/dev/drm/i915/intel_ddi.c

2859

I915_WRITE(PORT_CLK_SEL(port), hsw_pll_to_ddi_pll_sel(pll));

sys/dev/drm/i915/intel_ddi.c

2872

I915_WRITE(DDI_CLK_SEL(port), DDI_CLK_SEL_NONE);

sys/dev/drm/i915/intel_ddi.c

2874

I915_WRITE(DPCLKA_CFGCR0, I915_READ(DPCLKA_CFGCR0) |

sys/dev/drm/i915/intel_ddi.c

2877

I915_WRITE(DPLL_CTRL2, I915_READ(DPLL_CTRL2) |

sys/dev/drm/i915/intel_ddi.c

2880

I915_WRITE(PORT_CLK_SEL(port), PORT_CLK_SEL_NONE);

sys/dev/drm/i915/intel_ddi.c

3012

I915_WRITE(DDI_BUF_CTL(port), val);

sys/dev/drm/i915/intel_ddi.c

3019

I915_WRITE(DP_TP_CTL(port), val);

sys/dev/drm/i915/intel_ddi.c

3119

I915_WRITE(FDI_RX_CTL(PIPE_A), val);

sys/dev/drm/i915/intel_ddi.c

3127

I915_WRITE(FDI_RX_MISC(PIPE_A), val);

sys/dev/drm/i915/intel_ddi.c

3131

I915_WRITE(FDI_RX_CTL(PIPE_A), val);

sys/dev/drm/i915/intel_ddi.c

3135

I915_WRITE(FDI_RX_CTL(PIPE_A), val);

sys/dev/drm/i915/intel_ddi.c

3199

I915_WRITE(CHICKEN_TRANS(transcoder), val);

sys/dev/drm/i915/intel_ddi.c

3211

I915_WRITE(CHICKEN_TRANS(transcoder), val);

sys/dev/drm/i915/intel_ddi.c

3218

I915_WRITE(DDI_BUF_CTL(port),

sys/dev/drm/i915/intel_ddi.c

3307

I915_WRITE(DDI_BUF_CTL(port), val);

sys/dev/drm/i915/intel_ddi.c

3314

I915_WRITE(DP_TP_CTL(port), val);

sys/dev/drm/i915/intel_ddi.c

3330

I915_WRITE(DP_TP_CTL(port), val);

sys/dev/drm/i915/intel_ddi.c

3334

I915_WRITE(DDI_BUF_CTL(port), intel_dp->DP);

sys/dev/drm/i915/intel_ddi.c

987

I915_WRITE(DDI_BUF_TRANS_LO(port, i),

sys/dev/drm/i915/intel_ddi.c

989

I915_WRITE(DDI_BUF_TRANS_HI(port, i),

sys/dev/drm/i915/intel_display.c

1395

I915_WRITE(DPLL(pipe), pipe_config->dpll_hw_state.dpll);

sys/dev/drm/i915/intel_display.c

1421

I915_WRITE(DPLL_MD(pipe), pipe_config->dpll_hw_state.dpll_md);

sys/dev/drm/i915/intel_display.c

14263

I915_WRITE(PP_CONTROL(pps_idx), val);

sys/dev/drm/i915/intel_display.c

1449

I915_WRITE(DPLL(pipe), pipe_config->dpll_hw_state.dpll);

sys/dev/drm/i915/intel_display.c

1479

I915_WRITE(CBR4_VLV, CBR_DPLLBMD_PIPE(pipe));

sys/dev/drm/i915/intel_display.c

1480

I915_WRITE(DPLL_MD(PIPE_B), pipe_config->dpll_hw_state.dpll_md);

sys/dev/drm/i915/intel_display.c

1481

I915_WRITE(CBR4_VLV, 0);

sys/dev/drm/i915/intel_display.c

1490

I915_WRITE(DPLL_MD(pipe), pipe_config->dpll_hw_state.dpll_md);

sys/dev/drm/i915/intel_display.c

15160

I915_WRITE(vga_reg, VGA_DISP_DISABLE);

sys/dev/drm/i915/intel_display.c

1531

I915_WRITE(DPLL(!crtc->pipe),

sys/dev/drm/i915/intel_display.c

1540

I915_WRITE(reg, 0);

sys/dev/drm/i915/intel_display.c

1542

I915_WRITE(reg, dpll);

sys/dev/drm/i915/intel_display.c

1549

I915_WRITE(DPLL_MD(crtc->pipe),

sys/dev/drm/i915/intel_display.c

15505

I915_WRITE(FP0(pipe), fp);

sys/dev/drm/i915/intel_display.c

15506

I915_WRITE(FP1(pipe), fp);

sys/dev/drm/i915/intel_display.c

15508

I915_WRITE(HTOTAL(pipe), (640 - 1) | ((800 - 1) << 16));

sys/dev/drm/i915/intel_display.c

15509

I915_WRITE(HBLANK(pipe), (640 - 1) | ((800 - 1) << 16));

sys/dev/drm/i915/intel_display.c

15510

I915_WRITE(HSYNC(pipe), (656 - 1) | ((752 - 1) << 16));

sys/dev/drm/i915/intel_display.c

15511

I915_WRITE(VTOTAL(pipe), (480 - 1) | ((525 - 1) << 16));

sys/dev/drm/i915/intel_display.c

15512

I915_WRITE(VBLANK(pipe), (480 - 1) | ((525 - 1) << 16));

sys/dev/drm/i915/intel_display.c

15513

I915_WRITE(VSYNC(pipe), (490 - 1) | ((492 - 1) << 16));

sys/dev/drm/i915/intel_display.c

15514

I915_WRITE(PIPESRC(pipe), ((640 - 1) << 16) | (480 - 1));

sys/dev/drm/i915/intel_display.c

15521

I915_WRITE(DPLL(pipe), dpll & ~DPLL_VGA_MODE_DIS);

sys/dev/drm/i915/intel_display.c

15522

I915_WRITE(DPLL(pipe), dpll);

sys/dev/drm/i915/intel_display.c

15533

I915_WRITE(DPLL(pipe), dpll);

sys/dev/drm/i915/intel_display.c

15537

I915_WRITE(DPLL(pipe), dpll);

sys/dev/drm/i915/intel_display.c

15542

I915_WRITE(PIPECONF(pipe), PIPECONF_ENABLE | PIPECONF_PROGRESSIVE);

sys/dev/drm/i915/intel_display.c

15561

I915_WRITE(PIPECONF(pipe), 0);

sys/dev/drm/i915/intel_display.c

15566

I915_WRITE(DPLL(pipe), DPLL_VGA_MODE_DIS);

sys/dev/drm/i915/intel_display.c

1557

I915_WRITE(reg, dpll);

sys/dev/drm/i915/intel_display.c

1562

I915_WRITE(reg, dpll);

sys/dev/drm/i915/intel_display.c

15638

I915_WRITE(reg,

sys/dev/drm/i915/intel_display.c

1577

I915_WRITE(DPLL(PIPE_B),

sys/dev/drm/i915/intel_display.c

1579

I915_WRITE(DPLL(PIPE_A),

sys/dev/drm/i915/intel_display.c

1590

I915_WRITE(DPLL(pipe), DPLL_VGA_MODE_DIS);

sys/dev/drm/i915/intel_display.c

16013

I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) |

sys/dev/drm/i915/intel_display.c

16021

I915_WRITE(CHICKEN_PAR1_1,

sys/dev/drm/i915/intel_display.c

1606

I915_WRITE(DPLL(pipe), val);

sys/dev/drm/i915/intel_display.c

1623

I915_WRITE(DPLL(pipe), val);

sys/dev/drm/i915/intel_display.c

1690

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_display.c

1720

I915_WRITE(reg, val | TRANS_ENABLE);

sys/dev/drm/i915/intel_display.c

1739

I915_WRITE(TRANS_CHICKEN2(PIPE_A), val);

sys/dev/drm/i915/intel_display.c

1750

I915_WRITE(LPT_TRANSCONF, val);

sys/dev/drm/i915/intel_display.c

1775

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_display.c

1787

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_display.c

1797

I915_WRITE(LPT_TRANSCONF, val);

sys/dev/drm/i915/intel_display.c

1807

I915_WRITE(TRANS_CHICKEN2(PIPE_A), val);

sys/dev/drm/i915/intel_display.c

1862

I915_WRITE(reg, val | PIPECONF_ENABLE);

sys/dev/drm/i915/intel_display.c

1909

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_display.c

3523

I915_WRITE(SKL_PS_CTRL(intel_crtc->pipe, id), 0);

sys/dev/drm/i915/intel_display.c

3524

I915_WRITE(SKL_PS_WIN_POS(intel_crtc->pipe, id), 0);

sys/dev/drm/i915/intel_display.c

3525

I915_WRITE(SKL_PS_WIN_SZ(intel_crtc->pipe, id), 0);

sys/dev/drm/i915/intel_display.c

3930

I915_WRITE(PIPESRC(crtc->pipe),

sys/dev/drm/i915/intel_display.c

3966

I915_WRITE(reg, temp);

sys/dev/drm/i915/intel_display.c

3977

I915_WRITE(reg, temp | FDI_RX_ENHANCE_FRAME_ENABLE);

sys/dev/drm/i915/intel_display.c

3985

I915_WRITE(reg, I915_READ(reg) | FDI_FS_ERRC_ENABLE |

sys/dev/drm/i915/intel_display.c

4008

I915_WRITE(reg, temp);

sys/dev/drm/i915/intel_display.c

4019

I915_WRITE(reg, temp | FDI_TX_ENABLE);

sys/dev/drm/i915/intel_display.c

4025

I915_WRITE(reg, temp | FDI_RX_ENABLE);

sys/dev/drm/i915/intel_display.c

4031

I915_WRITE(FDI_RX_CHICKEN(pipe), FDI_RX_PHASE_SYNC_POINTER_OVR);

sys/dev/drm/i915/intel_display.c

4032

I915_WRITE(FDI_RX_CHICKEN(pipe), FDI_RX_PHASE_SYNC_POINTER_OVR |

sys/dev/drm/i915/intel_display.c

4042

I915_WRITE(reg, temp | FDI_RX_BIT_LOCK);

sys/dev/drm/i915/intel_display.c

4054

I915_WRITE(reg, temp);

sys/dev/drm/i915/intel_display.c

4060

I915_WRITE(reg, temp);

sys/dev/drm/i915/intel_display.c

4071

I915_WRITE(reg, temp | FDI_RX_SYMBOL_LOCK);

sys/dev/drm/i915/intel_display.c

4106

I915_WRITE(reg, temp);

sys/dev/drm/i915/intel_display.c

4121

I915_WRITE(reg, temp | FDI_TX_ENABLE);

sys/dev/drm/i915/intel_display.c

4123

I915_WRITE(FDI_RX_MISC(pipe),

sys/dev/drm/i915/intel_display.c

4135

I915_WRITE(reg, temp | FDI_RX_ENABLE);

sys/dev/drm/i915/intel_display.c

4145

I915_WRITE(reg, temp);

sys/dev/drm/i915/intel_display.c

4155

I915_WRITE(reg, temp | FDI_RX_BIT_LOCK);

sys/dev/drm/i915/intel_display.c

4177

I915_WRITE(reg, temp);

sys/dev/drm/i915/intel_display.c

4188

I915_WRITE(reg, temp);

sys/dev/drm/i915/intel_display.c

4198

I915_WRITE(reg, temp);

sys/dev/drm/i915/intel_display.c

4208

I915_WRITE(reg, temp | FDI_RX_SYMBOL_LOCK);

sys/dev/drm/i915/intel_display.c

4239

I915_WRITE(reg, temp);

sys/dev/drm/i915/intel_display.c

4254

I915_WRITE(reg, temp);

sys/dev/drm/i915/intel_display.c

4261

I915_WRITE(reg, temp);

sys/dev/drm/i915/intel_display.c

4272

I915_WRITE(reg, temp | FDI_TX_ENABLE);

sys/dev/drm/i915/intel_display.c

4274

I915_WRITE(FDI_RX_MISC(pipe),

sys/dev/drm/i915/intel_display.c

4281

I915_WRITE(reg, temp | FDI_RX_ENABLE);

sys/dev/drm/i915/intel_display.c

4293

I915_WRITE(reg, temp | FDI_RX_BIT_LOCK);

sys/dev/drm/i915/intel_display.c

4310

I915_WRITE(reg, temp);

sys/dev/drm/i915/intel_display.c

4316

I915_WRITE(reg, temp);

sys/dev/drm/i915/intel_display.c

4328

I915_WRITE(reg, temp | FDI_RX_SYMBOL_LOCK);

sys/dev/drm/i915/intel_display.c

4357

I915_WRITE(reg, temp | FDI_RX_PLL_ENABLE);

sys/dev/drm/i915/intel_display.c

4364

I915_WRITE(reg, temp | FDI_PCDCLK);

sys/dev/drm/i915/intel_display.c

4373

I915_WRITE(reg, temp | FDI_TX_PLL_ENABLE);

sys/dev/drm/i915/intel_display.c

4391

I915_WRITE(reg, temp & ~FDI_PCDCLK);

sys/dev/drm/i915/intel_display.c

4396

I915_WRITE(reg, temp & ~FDI_TX_PLL_ENABLE);

sys/dev/drm/i915/intel_display.c

4403

I915_WRITE(reg, temp & ~FDI_RX_PLL_ENABLE);

sys/dev/drm/i915/intel_display.c

4422

I915_WRITE(reg, temp & ~FDI_TX_ENABLE);

sys/dev/drm/i915/intel_display.c

4429

I915_WRITE(reg, temp & ~FDI_RX_ENABLE);

sys/dev/drm/i915/intel_display.c

4436

I915_WRITE(FDI_RX_CHICKEN(pipe), FDI_RX_PHASE_SYNC_POINTER_OVR);

sys/dev/drm/i915/intel_display.c

4443

I915_WRITE(reg, temp);

sys/dev/drm/i915/intel_display.c

4457

I915_WRITE(reg, temp);

sys/dev/drm/i915/intel_display.c

4492

I915_WRITE(PIXCLK_GATE, PIXCLK_GATE_GATE);

sys/dev/drm/i915/intel_display.c

4578

I915_WRITE(PIXCLK_GATE, PIXCLK_GATE_UNGATE);

sys/dev/drm/i915/intel_display.c

4625

I915_WRITE(PCH_TRANS_HTOTAL(pch_transcoder),

sys/dev/drm/i915/intel_display.c

4627

I915_WRITE(PCH_TRANS_HBLANK(pch_transcoder),

sys/dev/drm/i915/intel_display.c

4629

I915_WRITE(PCH_TRANS_HSYNC(pch_transcoder),

sys/dev/drm/i915/intel_display.c

4632

I915_WRITE(PCH_TRANS_VTOTAL(pch_transcoder),

sys/dev/drm/i915/intel_display.c

4634

I915_WRITE(PCH_TRANS_VBLANK(pch_transcoder),

sys/dev/drm/i915/intel_display.c

4636

I915_WRITE(PCH_TRANS_VSYNC(pch_transcoder),

sys/dev/drm/i915/intel_display.c

4638

I915_WRITE(PCH_TRANS_VSYNCSHIFT(pch_transcoder),

sys/dev/drm/i915/intel_display.c

4659

I915_WRITE(SOUTH_CHICKEN1, temp);

sys/dev/drm/i915/intel_display.c

4739

I915_WRITE(FDI_RX_TUSIZE1(pipe),

sys/dev/drm/i915/intel_display.c

4758

I915_WRITE(PCH_DPLL_SEL, temp);

sys/dev/drm/i915/intel_display.c

4801

I915_WRITE(reg, temp);

sys/dev/drm/i915/intel_display.c

5119

I915_WRITE(SKL_PS_CTRL(pipe, id), PS_SCALER_EN |

sys/dev/drm/i915/intel_display.c

5125

I915_WRITE(SKL_PS_WIN_POS(pipe, id), crtc->config->pch_pfit.pos);

sys/dev/drm/i915/intel_display.c

5126

I915_WRITE(SKL_PS_WIN_SZ(pipe, id), crtc->config->pch_pfit.size);

sys/dev/drm/i915/intel_display.c

5142

I915_WRITE(PF_CTL(pipe), PF_ENABLE | PF_FILTER_MED_3x3 |

sys/dev/drm/i915/intel_display.c

5145

I915_WRITE(PF_CTL(pipe), PF_ENABLE | PF_FILTER_MED_3x3);

sys/dev/drm/i915/intel_display.c

5146

I915_WRITE(PF_WIN_POS(pipe), crtc->config->pch_pfit.pos);

sys/dev/drm/i915/intel_display.c

5147

I915_WRITE(PF_WIN_SZ(pipe), crtc->config->pch_pfit.size);

sys/dev/drm/i915/intel_display.c

515

I915_WRITE(CHICKEN_PIPESL_1(pipe), HSW_FBCQ_DIS);

sys/dev/drm/i915/intel_display.c

517

I915_WRITE(CHICKEN_PIPESL_1(pipe), 0);

sys/dev/drm/i915/intel_display.c

5178

I915_WRITE(IPS_CTL, IPS_ENABLE);

sys/dev/drm/i915/intel_display.c

5214

I915_WRITE(IPS_CTL, 0);

sys/dev/drm/i915/intel_display.c

527

I915_WRITE(CLKGATE_DIS_PSL(pipe),

sys/dev/drm/i915/intel_display.c

530

I915_WRITE(CLKGATE_DIS_PSL(pipe),

sys/dev/drm/i915/intel_display.c

5734

I915_WRITE(CLKGATE_DIS_PSL(pipe), val);

sys/dev/drm/i915/intel_display.c

5748

I915_WRITE(PIPE_MBUS_DBOX_CTL(pipe), val);

sys/dev/drm/i915/intel_display.c

5787

I915_WRITE(PIPE_MULT(cpu_transcoder),

sys/dev/drm/i915/intel_display.c

5881

I915_WRITE(PF_CTL(pipe), 0);

sys/dev/drm/i915/intel_display.c

5882

I915_WRITE(PF_WIN_POS(pipe), 0);

sys/dev/drm/i915/intel_display.c

5883

I915_WRITE(PF_WIN_SZ(pipe), 0);

sys/dev/drm/i915/intel_display.c

5931

I915_WRITE(reg, temp);

sys/dev/drm/i915/intel_display.c

5936

I915_WRITE(PCH_DPLL_SEL, temp);

sys/dev/drm/i915/intel_display.c

5996

I915_WRITE(PFIT_PGM_RATIOS, pipe_config->gmch_pfit.pgm_ratios);

sys/dev/drm/i915/intel_display.c

5997

I915_WRITE(PFIT_CONTROL, pipe_config->gmch_pfit.control);

sys/dev/drm/i915/intel_display.c

6001

I915_WRITE(BCLRPAT(crtc->pipe), 0);

sys/dev/drm/i915/intel_display.c

6140

I915_WRITE(CHV_BLEND(pipe), CHV_BLEND_LEGACY);

sys/dev/drm/i915/intel_display.c

6141

I915_WRITE(CHV_CANVAS(pipe), 0);

sys/dev/drm/i915/intel_display.c

6183

I915_WRITE(FP0(crtc->pipe), crtc->config->dpll_hw_state.fp0);

sys/dev/drm/i915/intel_display.c

6184

I915_WRITE(FP1(crtc->pipe), crtc->config->dpll_hw_state.fp1);

sys/dev/drm/i915/intel_display.c

6249

I915_WRITE(PFIT_CONTROL, 0);

sys/dev/drm/i915/intel_display.c

6936

I915_WRITE(PCH_TRANS_DATA_M1(pipe), TU_SIZE(m_n->tu) | m_n->gmch_m);

sys/dev/drm/i915/intel_display.c

6937

I915_WRITE(PCH_TRANS_DATA_N1(pipe), m_n->gmch_n);

sys/dev/drm/i915/intel_display.c

6938

I915_WRITE(PCH_TRANS_LINK_M1(pipe), m_n->link_m);

sys/dev/drm/i915/intel_display.c

6939

I915_WRITE(PCH_TRANS_LINK_N1(pipe), m_n->link_n);

sys/dev/drm/i915/intel_display.c

6951

I915_WRITE(PIPE_DATA_M1(transcoder), TU_SIZE(m_n->tu) | m_n->gmch_m);

sys/dev/drm/i915/intel_display.c

6952

I915_WRITE(PIPE_DATA_N1(transcoder), m_n->gmch_n);

sys/dev/drm/i915/intel_display.c

6953

I915_WRITE(PIPE_LINK_M1(transcoder), m_n->link_m);

sys/dev/drm/i915/intel_display.c

6954

I915_WRITE(PIPE_LINK_N1(transcoder), m_n->link_n);

sys/dev/drm/i915/intel_display.c

6961

I915_WRITE(PIPE_DATA_M2(transcoder),

sys/dev/drm/i915/intel_display.c

6963

I915_WRITE(PIPE_DATA_N2(transcoder), m2_n2->gmch_n);

sys/dev/drm/i915/intel_display.c

6964

I915_WRITE(PIPE_LINK_M2(transcoder), m2_n2->link_m);

sys/dev/drm/i915/intel_display.c

6965

I915_WRITE(PIPE_LINK_N2(transcoder), m2_n2->link_n);

sys/dev/drm/i915/intel_display.c

6968

I915_WRITE(PIPE_DATA_M_G4X(pipe), TU_SIZE(m_n->tu) | m_n->gmch_m);

sys/dev/drm/i915/intel_display.c

6969

I915_WRITE(PIPE_DATA_N_G4X(pipe), m_n->gmch_n);

sys/dev/drm/i915/intel_display.c

6970

I915_WRITE(PIPE_LINK_M_G4X(pipe), m_n->link_m);

sys/dev/drm/i915/intel_display.c

6971

I915_WRITE(PIPE_LINK_N_G4X(pipe), m_n->link_n);

sys/dev/drm/i915/intel_display.c

7044

I915_WRITE(DPLL(pipe),

sys/dev/drm/i915/intel_display.c

7145

I915_WRITE(DPLL(pipe),

sys/dev/drm/i915/intel_display.c

7432

I915_WRITE(VSYNCSHIFT(cpu_transcoder), vsyncshift);

sys/dev/drm/i915/intel_display.c

7434

I915_WRITE(HTOTAL(cpu_transcoder),

sys/dev/drm/i915/intel_display.c

7437

I915_WRITE(HBLANK(cpu_transcoder),

sys/dev/drm/i915/intel_display.c

7440

I915_WRITE(HSYNC(cpu_transcoder),

sys/dev/drm/i915/intel_display.c

7444

I915_WRITE(VTOTAL(cpu_transcoder),

sys/dev/drm/i915/intel_display.c

7447

I915_WRITE(VBLANK(cpu_transcoder),

sys/dev/drm/i915/intel_display.c

7450

I915_WRITE(VSYNC(cpu_transcoder),

sys/dev/drm/i915/intel_display.c

7460

I915_WRITE(VTOTAL(pipe), I915_READ(VTOTAL(cpu_transcoder)));

sys/dev/drm/i915/intel_display.c

7473

I915_WRITE(PIPESRC(pipe),

sys/dev/drm/i915/intel_display.c

7602

I915_WRITE(PIPECONF(intel_crtc->pipe), pipeconf);

sys/dev/drm/i915/intel_display.c

8197

I915_WRITE(PCH_DREF_CONTROL, val);

sys/dev/drm/i915/intel_display.c

8213

I915_WRITE(PCH_DREF_CONTROL, val);

sys/dev/drm/i915/intel_display.c

8224

I915_WRITE(PCH_DREF_CONTROL, val);

sys/dev/drm/i915/intel_display.c

8238

I915_WRITE(PCH_DREF_CONTROL, val);

sys/dev/drm/i915/intel_display.c

8253

I915_WRITE(SOUTH_CHICKEN2, tmp);

sys/dev/drm/i915/intel_display.c

8261

I915_WRITE(SOUTH_CHICKEN2, tmp);

sys/dev/drm/i915/intel_display.c

8547

I915_WRITE(PIPECONF(pipe), val);

sys/dev/drm/i915/intel_display.c

8566

I915_WRITE(PIPECONF(cpu_transcoder), val);

sys/dev/drm/i915/intel_display.c

8606

I915_WRITE(PIPEMISC(intel_crtc->pipe), val);

sys/dev/drm/i915/intel_display.c

9188

I915_WRITE(D_COMP_BDW, val);

sys/dev/drm/i915/intel_display.c

9212

I915_WRITE(LCPLL_CTL, val);

sys/dev/drm/i915/intel_display.c

9222

I915_WRITE(LCPLL_CTL, val);

sys/dev/drm/i915/intel_display.c

9240

I915_WRITE(LCPLL_CTL, val);

sys/dev/drm/i915/intel_display.c

9267

I915_WRITE(LCPLL_CTL, val);

sys/dev/drm/i915/intel_display.c

9278

I915_WRITE(LCPLL_CTL, val);

sys/dev/drm/i915/intel_display.c

9288

I915_WRITE(LCPLL_CTL, val);

sys/dev/drm/i915/intel_display.c

9333

I915_WRITE(SOUTH_DSPCLK_GATE_D, val);

sys/dev/drm/i915/intel_display.c

9352

I915_WRITE(SOUTH_DSPCLK_GATE_D, val);

sys/dev/drm/i915/intel_dp.c

1076

I915_WRITE(pp_div_reg, pp_div | 0x1F);

sys/dev/drm/i915/intel_dp.c

1077

I915_WRITE(pp_ctrl_reg, PANEL_UNLOCK_REGS | PANEL_POWER_OFF);

sys/dev/drm/i915/intel_dp.c

1334

I915_WRITE(ch_data[i >> 2],

sys/dev/drm/i915/intel_dp.c

1339

I915_WRITE(ch_ctl, send_ctl);

sys/dev/drm/i915/intel_dp.c

1344

I915_WRITE(ch_ctl,

sys/dev/drm/i915/intel_dp.c

2195

I915_WRITE(TRANS_DP_CTL(crtc->pipe), trans_dp);

sys/dev/drm/i915/intel_dp.c

2359

I915_WRITE(pp_ctrl_reg, pp);

sys/dev/drm/i915/intel_dp.c

2421

I915_WRITE(pp_ctrl_reg, pp);

sys/dev/drm/i915/intel_dp.c

2509

I915_WRITE(pp_ctrl_reg, pp);

sys/dev/drm/i915/intel_dp.c

2517

I915_WRITE(pp_ctrl_reg, pp);

sys/dev/drm/i915/intel_dp.c

2525

I915_WRITE(pp_ctrl_reg, pp);

sys/dev/drm/i915/intel_dp.c

2568

I915_WRITE(pp_ctrl_reg, pp);

sys/dev/drm/i915/intel_dp.c

2610

I915_WRITE(pp_ctrl_reg, pp);

sys/dev/drm/i915/intel_dp.c

2648

I915_WRITE(pp_ctrl_reg, pp);

sys/dev/drm/i915/intel_dp.c

2741

I915_WRITE(DP_A, intel_dp->DP);

sys/dev/drm/i915/intel_dp.c

2756

I915_WRITE(DP_A, intel_dp->DP);

sys/dev/drm/i915/intel_dp.c

2775

I915_WRITE(DP_A, intel_dp->DP);

sys/dev/drm/i915/intel_dp.c

288

I915_WRITE(MG_DP_MODE(port, 0), ln0);

sys/dev/drm/i915/intel_dp.c

289

I915_WRITE(MG_DP_MODE(port, 1), ln1);

sys/dev/drm/i915/intel_dp.c

3101

I915_WRITE(DP_TP_CTL(port), temp);

sys/dev/drm/i915/intel_dp.c

311

I915_WRITE(mg_regs[i], val);

sys/dev/drm/i915/intel_dp.c

3163

I915_WRITE(intel_dp->output_reg, intel_dp->DP);

sys/dev/drm/i915/intel_dp.c

322

I915_WRITE(MG_MISC_SUS0(tc_port), val);

sys/dev/drm/i915/intel_dp.c

3268

I915_WRITE(pp_on_reg, 0);

sys/dev/drm/i915/intel_dp.c

344

I915_WRITE(mg_regs[i], val);

sys/dev/drm/i915/intel_dp.c

355

I915_WRITE(MG_MISC_SUS0(tc_port), val);

sys/dev/drm/i915/intel_dp.c

3772

I915_WRITE(intel_dp->output_reg, intel_dp->DP);

sys/dev/drm/i915/intel_dp.c

3786

I915_WRITE(intel_dp->output_reg, intel_dp->DP);

sys/dev/drm/i915/intel_dp.c

3803

I915_WRITE(DP_TP_CTL(port), val);

sys/dev/drm/i915/intel_dp.c

3848

I915_WRITE(intel_dp->output_reg, DP);

sys/dev/drm/i915/intel_dp.c

3852

I915_WRITE(intel_dp->output_reg, DP);

sys/dev/drm/i915/intel_dp.c

3872

I915_WRITE(intel_dp->output_reg, DP);

sys/dev/drm/i915/intel_dp.c

3876

I915_WRITE(intel_dp->output_reg, DP);

sys/dev/drm/i915/intel_dp.c

4861

I915_WRITE(PORT_TX_DFLEXDPCSSS, val);

sys/dev/drm/i915/intel_dp.c

4873

I915_WRITE(PORT_TX_DFLEXDPCSSS, val);

sys/dev/drm/i915/intel_dp.c

4901

I915_WRITE(PORT_TX_DFLEXDPCSSS, val);

sys/dev/drm/i915/intel_dp.c

5789

I915_WRITE(regs.pp_ctrl, pp_ctl);

sys/dev/drm/i915/intel_dp.c

5969

I915_WRITE(regs.pp_ctrl, pp);

sys/dev/drm/i915/intel_dp.c

6013

I915_WRITE(regs.pp_on, pp_on);

sys/dev/drm/i915/intel_dp.c

6014

I915_WRITE(regs.pp_off, pp_off);

sys/dev/drm/i915/intel_dp.c

6017

I915_WRITE(regs.pp_ctrl, pp_div);

sys/dev/drm/i915/intel_dp.c

6019

I915_WRITE(regs.pp_div, pp_div);

sys/dev/drm/i915/intel_dp.c

6131

I915_WRITE(reg, val);

sys/dev/drm/i915/intel_dp.c

6668

I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);

sys/dev/drm/i915/intel_dp.c

764

I915_WRITE(intel_dp->output_reg, DP);

sys/dev/drm/i915/intel_dp.c

767

I915_WRITE(intel_dp->output_reg, DP | DP_PORT_EN);

sys/dev/drm/i915/intel_dp.c

770

I915_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN);

sys/dev/drm/i915/intel_dp_mst.c

257

I915_WRITE(DP_TP_STATUS(port), temp);

sys/dev/drm/i915/intel_dpio_phy.c

279

I915_WRITE(BXT_PORT_PCS_DW10_GRP(phy, ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

284

I915_WRITE(BXT_PORT_TX_DW2_GRP(phy, ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

294

I915_WRITE(BXT_PORT_TX_DW3_GRP(phy, ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

299

I915_WRITE(BXT_PORT_TX_DW4_GRP(phy, ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

303

I915_WRITE(BXT_PORT_PCS_DW10_GRP(phy, ch), val);

sys/dev/drm/i915/intel_dpio_phy.c

376

I915_WRITE(BXT_P_CR_GT_DISP_PWRON, val);

sys/dev/drm/i915/intel_dpio_phy.c

396

I915_WRITE(BXT_PORT_CL1CM_DW9(phy), val);

sys/dev/drm/i915/intel_dpio_phy.c

401

I915_WRITE(BXT_PORT_CL1CM_DW10(phy), val);

sys/dev/drm/i915/intel_dpio_phy.c

407

I915_WRITE(BXT_PORT_CL1CM_DW28(phy), val);

sys/dev/drm/i915/intel_dpio_phy.c

412

I915_WRITE(BXT_PORT_CL2CM_DW6(phy), val);

sys/dev/drm/i915/intel_dpio_phy.c

430

I915_WRITE(BXT_PORT_REF_DW6(phy), grc_code);

sys/dev/drm/i915/intel_dpio_phy.c

434

I915_WRITE(BXT_PORT_REF_DW8(phy), val);

sys/dev/drm/i915/intel_dpio_phy.c

442

I915_WRITE(BXT_PHY_CTL_FAMILY(phy), val);

sys/dev/drm/i915/intel_dpio_phy.c

454

I915_WRITE(BXT_PHY_CTL_FAMILY(phy), val);

sys/dev/drm/i915/intel_dpio_phy.c

458

I915_WRITE(BXT_P_CR_GT_DISP_PWRON, val);

sys/dev/drm/i915/intel_dpio_phy.c

609

I915_WRITE(BXT_PORT_TX_DW14_LN(phy, ch, lane), val);

sys/dev/drm/i915/intel_dpll_mgr.c

1455

I915_WRITE(BXT_PORT_PLL_ENABLE(port), temp);

sys/dev/drm/i915/intel_dpll_mgr.c

1460

I915_WRITE(BXT_PORT_PLL_ENABLE(port), temp);

sys/dev/drm/i915/intel_dpll_mgr.c

1470

I915_WRITE(BXT_PORT_PLL_EBB_4(phy, ch), temp);

sys/dev/drm/i915/intel_dpll_mgr.c

1476

I915_WRITE(BXT_PORT_PLL_EBB_0(phy, ch), temp);

sys/dev/drm/i915/intel_dpll_mgr.c

1482

I915_WRITE(BXT_PORT_PLL(phy, ch, 0), temp);

sys/dev/drm/i915/intel_dpll_mgr.c

1488

I915_WRITE(BXT_PORT_PLL(phy, ch, 1), temp);

sys/dev/drm/i915/intel_dpll_mgr.c

1494

I915_WRITE(BXT_PORT_PLL(phy, ch, 2), temp);

sys/dev/drm/i915/intel_dpll_mgr.c

1500

I915_WRITE(BXT_PORT_PLL(phy, ch, 3), temp);

sys/dev/drm/i915/intel_dpll_mgr.c

1508

I915_WRITE(BXT_PORT_PLL(phy, ch, 6), temp);

sys/dev/drm/i915/intel_dpll_mgr.c

1514

I915_WRITE(BXT_PORT_PLL(phy, ch, 8), temp);

sys/dev/drm/i915/intel_dpll_mgr.c

1519

I915_WRITE(BXT_PORT_PLL(phy, ch, 9), temp);

sys/dev/drm/i915/intel_dpll_mgr.c

1525

I915_WRITE(BXT_PORT_PLL(phy, ch, 10), temp);

sys/dev/drm/i915/intel_dpll_mgr.c

1530

I915_WRITE(BXT_PORT_PLL_EBB_4(phy, ch), temp);

sys/dev/drm/i915/intel_dpll_mgr.c

1533

I915_WRITE(BXT_PORT_PLL_EBB_4(phy, ch), temp);

sys/dev/drm/i915/intel_dpll_mgr.c

1538

I915_WRITE(BXT_PORT_PLL_ENABLE(port), temp);

sys/dev/drm/i915/intel_dpll_mgr.c

1548

I915_WRITE(BXT_PORT_TX_DW5_GRP(phy, ch), temp);

sys/dev/drm/i915/intel_dpll_mgr.c

1559

I915_WRITE(BXT_PORT_PCS_DW12_GRP(phy, ch), temp);

sys/dev/drm/i915/intel_dpll_mgr.c

1570

I915_WRITE(BXT_PORT_PLL_ENABLE(port), temp);

sys/dev/drm/i915/intel_dpll_mgr.c

1576

I915_WRITE(BXT_PORT_PLL_ENABLE(port), temp);

sys/dev/drm/i915/intel_dpll_mgr.c

1974

I915_WRITE(CNL_DPLL_ENABLE(id), val);

sys/dev/drm/i915/intel_dpll_mgr.c

1989

I915_WRITE(CNL_DPLL_CFGCR0(id), val);

sys/dev/drm/i915/intel_dpll_mgr.c

1998

I915_WRITE(CNL_DPLL_CFGCR1(id), val);

sys/dev/drm/i915/intel_dpll_mgr.c

2015

I915_WRITE(CNL_DPLL_ENABLE(id), val);

sys/dev/drm/i915/intel_dpll_mgr.c

2063

I915_WRITE(CNL_DPLL_ENABLE(id), val);

sys/dev/drm/i915/intel_dpll_mgr.c

2085

I915_WRITE(CNL_DPLL_ENABLE(id), val);

sys/dev/drm/i915/intel_dpll_mgr.c

3033

I915_WRITE(ICL_DPLL_CFGCR0(id), hw_state->cfgcr0);

sys/dev/drm/i915/intel_dpll_mgr.c

3034

I915_WRITE(ICL_DPLL_CFGCR1(id), hw_state->cfgcr1);

sys/dev/drm/i915/intel_dpll_mgr.c

3054

I915_WRITE(MG_REFCLKIN_CTL(port), val);

sys/dev/drm/i915/intel_dpll_mgr.c

3059

I915_WRITE(MG_CLKTOP2_CORECLKCTL1(port), val);

sys/dev/drm/i915/intel_dpll_mgr.c

3067

I915_WRITE(MG_CLKTOP2_HSCLKCTL(port), val);

sys/dev/drm/i915/intel_dpll_mgr.c

3069

I915_WRITE(MG_PLL_DIV0(port), hw_state->mg_pll_div0);

sys/dev/drm/i915/intel_dpll_mgr.c

3070

I915_WRITE(MG_PLL_DIV1(port), hw_state->mg_pll_div1);

sys/dev/drm/i915/intel_dpll_mgr.c

3071

I915_WRITE(MG_PLL_LF(port), hw_state->mg_pll_lf);

sys/dev/drm/i915/intel_dpll_mgr.c

3072

I915_WRITE(MG_PLL_FRAC_LOCK(port), hw_state->mg_pll_frac_lock);

sys/dev/drm/i915/intel_dpll_mgr.c

3073

I915_WRITE(MG_PLL_SSC(port), hw_state->mg_pll_ssc);

sys/dev/drm/i915/intel_dpll_mgr.c

3078

I915_WRITE(MG_PLL_BIAS(port), val);

sys/dev/drm/i915/intel_dpll_mgr.c

3083

I915_WRITE(MG_PLL_TDC_COLDST_BIAS(port), val);

sys/dev/drm/i915/intel_dpll_mgr.c

3097

I915_WRITE(enable_reg, val);

sys/dev/drm/i915/intel_dpll_mgr.c

3131

I915_WRITE(enable_reg, val);

sys/dev/drm/i915/intel_dpll_mgr.c

3157

I915_WRITE(enable_reg, val);

sys/dev/drm/i915/intel_dpll_mgr.c

3167

I915_WRITE(enable_reg, val);

sys/dev/drm/i915/intel_dpll_mgr.c

367

I915_WRITE(PCH_FP0(id), pll->state.hw_state.fp0);

sys/dev/drm/i915/intel_dpll_mgr.c

368

I915_WRITE(PCH_FP1(id), pll->state.hw_state.fp1);

sys/dev/drm/i915/intel_dpll_mgr.c

392

I915_WRITE(PCH_DPLL(id), pll->state.hw_state.dpll);

sys/dev/drm/i915/intel_dpll_mgr.c

403

I915_WRITE(PCH_DPLL(id), pll->state.hw_state.dpll);

sys/dev/drm/i915/intel_dpll_mgr.c

421

I915_WRITE(PCH_DPLL(id), 0);

sys/dev/drm/i915/intel_dpll_mgr.c

480

I915_WRITE(WRPLL_CTL(id), pll->state.hw_state.wrpll);

sys/dev/drm/i915/intel_dpll_mgr.c

488

I915_WRITE(SPLL_CTL, pll->state.hw_state.spll);

sys/dev/drm/i915/intel_dpll_mgr.c

500

I915_WRITE(WRPLL_CTL(id), val & ~WRPLL_PLL_ENABLE);

sys/dev/drm/i915/intel_dpll_mgr.c

510

I915_WRITE(SPLL_CTL, val & ~SPLL_PLL_ENABLE);

sys/dev/drm/i915/intel_dpll_mgr.c

940

I915_WRITE(DPLL_CTRL1, val);

sys/dev/drm/i915/intel_dpll_mgr.c

952

I915_WRITE(regs[id].cfgcr1, pll->state.hw_state.cfgcr1);

sys/dev/drm/i915/intel_dpll_mgr.c

953

I915_WRITE(regs[id].cfgcr2, pll->state.hw_state.cfgcr2);

sys/dev/drm/i915/intel_dpll_mgr.c

958

I915_WRITE(regs[id].ctl,

sys/dev/drm/i915/intel_dpll_mgr.c

982

I915_WRITE(regs[id].ctl,

sys/dev/drm/i915/intel_dvo.c

185

I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);

sys/dev/drm/i915/intel_dvo.c

202

I915_WRITE(dvo_reg, temp | DVO_ENABLE);

sys/dev/drm/i915/intel_dvo.c

291

I915_WRITE(dvo_srcdim_reg,

sys/dev/drm/i915/intel_dvo.c

295

I915_WRITE(dvo_reg, dvo_val);

sys/dev/drm/i915/intel_dvo.c

479

I915_WRITE(DPLL(pipe), dpll[pipe] | DPLL_DVO_2X_MODE);

sys/dev/drm/i915/intel_dvo.c

486

I915_WRITE(DPLL(pipe), dpll[pipe]);

sys/dev/drm/i915/intel_engine_cs.c

439

I915_WRITE(RING_SYNC_0(engine->mmio_base), 0);

sys/dev/drm/i915/intel_engine_cs.c

440

I915_WRITE(RING_SYNC_1(engine->mmio_base), 0);

sys/dev/drm/i915/intel_engine_cs.c

442

I915_WRITE(RING_SYNC_2(engine->mmio_base), 0);

sys/dev/drm/i915/intel_fbc.c

106

I915_WRITE(FBC_CONTROL, fbc_ctl);

sys/dev/drm/i915/intel_fbc.c

1321

I915_WRITE(FBC_CONTROL, 500 << FBC_CTL_INTERVAL_SHIFT);

sys/dev/drm/i915/intel_fbc.c

137

I915_WRITE(FBC_TAG(i), 0);

sys/dev/drm/i915/intel_fbc.c

145

I915_WRITE(FBC_CONTROL2, fbc_ctl2);

sys/dev/drm/i915/intel_fbc.c

146

I915_WRITE(FBC_FENCE_OFF, params->crtc.fence_y_offset);

sys/dev/drm/i915/intel_fbc.c

157

I915_WRITE(FBC_CONTROL, fbc_ctl);

sys/dev/drm/i915/intel_fbc.c

178

I915_WRITE(DPFC_FENCE_YOFF, params->crtc.fence_y_offset);

sys/dev/drm/i915/intel_fbc.c

180

I915_WRITE(DPFC_FENCE_YOFF, 0);

sys/dev/drm/i915/intel_fbc.c

184

I915_WRITE(DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);

sys/dev/drm/i915/intel_fbc.c

195

I915_WRITE(DPFC_CONTROL, dpfc_ctl);

sys/dev/drm/i915/intel_fbc.c

207

I915_WRITE(MSG_FBC_REND_STATE, FBC_REND_NUKE);

sys/dev/drm/i915/intel_fbc.c

239

I915_WRITE(SNB_DPFC_CTL_SA,

sys/dev/drm/i915/intel_fbc.c

242

I915_WRITE(DPFC_CPU_FENCE_OFFSET,

sys/dev/drm/i915/intel_fbc.c

247

I915_WRITE(SNB_DPFC_CTL_SA, 0);

sys/dev/drm/i915/intel_fbc.c

248

I915_WRITE(DPFC_CPU_FENCE_OFFSET, 0);

sys/dev/drm/i915/intel_fbc.c

252

I915_WRITE(ILK_DPFC_FENCE_YOFF, params->crtc.fence_y_offset);

sys/dev/drm/i915/intel_fbc.c

253

I915_WRITE(ILK_FBC_RT_BASE,

sys/dev/drm/i915/intel_fbc.c

256

I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);

sys/dev/drm/i915/intel_fbc.c

269

I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl);

sys/dev/drm/i915/intel_fbc.c

294

I915_WRITE(CHICKEN_MISC_4, val);

sys/dev/drm/i915/intel_fbc.c

319

I915_WRITE(SNB_DPFC_CTL_SA,

sys/dev/drm/i915/intel_fbc.c

322

I915_WRITE(DPFC_CPU_FENCE_OFFSET, params->crtc.fence_y_offset);

sys/dev/drm/i915/intel_fbc.c

324

I915_WRITE(SNB_DPFC_CTL_SA,0);

sys/dev/drm/i915/intel_fbc.c

325

I915_WRITE(DPFC_CPU_FENCE_OFFSET, 0);

sys/dev/drm/i915/intel_fbc.c

333

I915_WRITE(ILK_DISPLAY_CHICKEN1,

sys/dev/drm/i915/intel_fbc.c

338

I915_WRITE(CHICKEN_PIPESL_1(params->crtc.pipe),

sys/dev/drm/i915/intel_fbc.c

343

I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);

sys/dev/drm/i915/intel_fbc.c

511

I915_WRITE(ILK_DPFC_CB_BASE, fbc->compressed_fb.start);

sys/dev/drm/i915/intel_fbc.c

513

I915_WRITE(DPFC_CB_BASE, fbc->compressed_fb.start);

sys/dev/drm/i915/intel_fbc.c

532

I915_WRITE(FBC_CFB_BASE,

sys/dev/drm/i915/intel_fbc.c

534

I915_WRITE(FBC_LL_BASE,

sys/dev/drm/i915/intel_fifo_underrun.c

118

I915_WRITE(reg, enable_mask | PIPE_FIFO_UNDERRUN_STATUS);

sys/dev/drm/i915/intel_fifo_underrun.c

150

I915_WRITE(GEN7_ERR_INT, ERR_INT_FIFO_UNDERRUN(pipe));

sys/dev/drm/i915/intel_fifo_underrun.c

163

I915_WRITE(GEN7_ERR_INT, ERR_INT_FIFO_UNDERRUN(pipe));

sys/dev/drm/i915/intel_fifo_underrun.c

216

I915_WRITE(SERR_INT, SERR_INT_TRANS_FIFO_UNDERRUN(pch_transcoder));

sys/dev/drm/i915/intel_fifo_underrun.c

231

I915_WRITE(SERR_INT,

sys/dev/drm/i915/intel_fifo_underrun.c

99

I915_WRITE(reg, enable_mask | PIPE_FIFO_UNDERRUN_STATUS);

sys/dev/drm/i915/intel_guc.c

373

I915_WRITE(SOFT_SCRATCH(0), 0);

sys/dev/drm/i915/intel_guc.c

376

I915_WRITE(SOFT_SCRATCH(1 + i), params[i]);

sys/dev/drm/i915/intel_guc.c

38

I915_WRITE(GUC_SEND_INTERRUPT, GUC_SEND_TRIGGER);

sys/dev/drm/i915/intel_guc.c

419

I915_WRITE(guc_send_reg(guc, i), action[i]);

sys/dev/drm/i915/intel_guc.c

482

I915_WRITE(SOFT_SCRATCH(15), val & ~msg);

sys/dev/drm/i915/intel_guc_fw.c

105

I915_WRITE(GUC_SHIM_CONTROL, GUC_DISABLE_SRAM_INIT_TO_ZEROES |

sys/dev/drm/i915/intel_guc_fw.c

113

I915_WRITE(GEN9LP_GT_PM_CONFIG, GT_DOORBELL_ENABLE);

sys/dev/drm/i915/intel_guc_fw.c

115

I915_WRITE(GEN9_GT_PM_CONFIG, GT_DOORBELL_ENABLE);

sys/dev/drm/i915/intel_guc_fw.c

119

I915_WRITE(GEN7_MISCCPCTL, (GEN8_DOP_CLOCK_GATE_GUC_ENABLE |

sys/dev/drm/i915/intel_guc_fw.c

123

I915_WRITE(GUC_ARAT_C6DIS, 0x1FF);

sys/dev/drm/i915/intel_guc_fw.c

141

I915_WRITE(UOS_RSA_SCRATCH(i), rsa[i]);

sys/dev/drm/i915/intel_guc_fw.c

165

I915_WRITE(DMA_COPY_SIZE, guc_fw->header_size + guc_fw->ucode_size);

sys/dev/drm/i915/intel_guc_fw.c

169

I915_WRITE(DMA_ADDR_0_LOW, lower_32_bits(offset));

sys/dev/drm/i915/intel_guc_fw.c

170

I915_WRITE(DMA_ADDR_0_HIGH, upper_32_bits(offset) & 0xFFFF);

sys/dev/drm/i915/intel_guc_fw.c

176

I915_WRITE(DMA_ADDR_1_LOW, 0x2000);

sys/dev/drm/i915/intel_guc_fw.c

177

I915_WRITE(DMA_ADDR_1_HIGH, DMA_ADDRESS_SPACE_WOPCM);

sys/dev/drm/i915/intel_guc_fw.c

180

I915_WRITE(DMA_CTRL, _MASKED_BIT_ENABLE(UOS_MOVE | START_DMA));

sys/dev/drm/i915/intel_guc_submission.c

1183

I915_WRITE(RING_MODE_GEN7(engine), irqs);

sys/dev/drm/i915/intel_guc_submission.c

1189

I915_WRITE(GUC_BCS_RCS_IER, ~irqs);

sys/dev/drm/i915/intel_guc_submission.c

1190

I915_WRITE(GUC_VCS2_VCS1_IER, ~irqs);

sys/dev/drm/i915/intel_guc_submission.c

1191

I915_WRITE(GUC_WD_VECS_IER, ~irqs);

sys/dev/drm/i915/intel_guc_submission.c

1230

I915_WRITE(RING_MODE_GEN7(engine), irqs);

sys/dev/drm/i915/intel_guc_submission.c

1233

I915_WRITE(GUC_BCS_RCS_IER, 0);

sys/dev/drm/i915/intel_guc_submission.c

1234

I915_WRITE(GUC_VCS2_VCS1_IER, 0);

sys/dev/drm/i915/intel_guc_submission.c

1235

I915_WRITE(GUC_WD_VECS_IER, 0);

sys/dev/drm/i915/intel_hdcp.c

118

I915_WRITE(HDCP_KEY_CONF, HDCP_KEY_LOAD_TRIGGER);

sys/dev/drm/i915/intel_hdcp.c

131

I915_WRITE(HDCP_KEY_CONF, HDCP_AKSV_SEND_TRIGGER);

sys/dev/drm/i915/intel_hdcp.c

139

I915_WRITE(HDCP_SHA_TEXT, sha_text);

sys/dev/drm/i915/intel_hdcp.c

198

I915_WRITE(HDCP_SHA_V_PRIME(i), vprime);

sys/dev/drm/i915/intel_hdcp.c

215

I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_32);

sys/dev/drm/i915/intel_hdcp.c

232

I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_32);

sys/dev/drm/i915/intel_hdcp.c

264

I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_16);

sys/dev/drm/i915/intel_hdcp.c

272

I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_0);

sys/dev/drm/i915/intel_hdcp.c

279

I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_16);

sys/dev/drm/i915/intel_hdcp.c

287

I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_24);

sys/dev/drm/i915/intel_hdcp.c

297

I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_0);

sys/dev/drm/i915/intel_hdcp.c

304

I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_8);

sys/dev/drm/i915/intel_hdcp.c

312

I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_32);

sys/dev/drm/i915/intel_hdcp.c

320

I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_0);

sys/dev/drm/i915/intel_hdcp.c

329

I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_32);

sys/dev/drm/i915/intel_hdcp.c

337

I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_8);

sys/dev/drm/i915/intel_hdcp.c

344

I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_0);

sys/dev/drm/i915/intel_hdcp.c

351

I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_24);

sys/dev/drm/i915/intel_hdcp.c

362

I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_32);

sys/dev/drm/i915/intel_hdcp.c

382

I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_COMPLETE_HASH);

sys/dev/drm/i915/intel_hdcp.c

509

I915_WRITE(PORT_HDCP_ANINIT(port), get_random_u32());

sys/dev/drm/i915/intel_hdcp.c

510

I915_WRITE(PORT_HDCP_CONF(port), HDCP_CONF_CAPTURE_AN);

sys/dev/drm/i915/intel_hdcp.c

543

I915_WRITE(PORT_HDCP_BKSVLO(port), bksv.reg[0]);

sys/dev/drm/i915/intel_hdcp.c

544

I915_WRITE(PORT_HDCP_BKSVHI(port), bksv.reg[1]);

sys/dev/drm/i915/intel_hdcp.c

550

I915_WRITE(HDCP_REP_CTL,

sys/dev/drm/i915/intel_hdcp.c

557

I915_WRITE(PORT_HDCP_CONF(port), HDCP_CONF_AUTH_AND_ENC);

sys/dev/drm/i915/intel_hdcp.c

588

I915_WRITE(PORT_HDCP_RPRIME(port), ri.reg);

sys/dev/drm/i915/intel_hdcp.c

637

I915_WRITE(PORT_HDCP_CONF(port), 0);

sys/dev/drm/i915/intel_hdcp.c

79

I915_WRITE(HDCP_KEY_CONF, HDCP_CLEAR_KEYS_TRIGGER);

sys/dev/drm/i915/intel_hdcp.c

80

I915_WRITE(HDCP_KEY_STATUS, HDCP_KEY_LOAD_DONE | HDCP_KEY_LOAD_STATUS |

sys/dev/drm/i915/intel_hdmi.c

1111

I915_WRITE(PORT_HDCP_RPRIME(port), ri.reg);

sys/dev/drm/i915/intel_hdmi.c

1171

I915_WRITE(intel_hdmi->hdmi_reg, hdmi_val);