sys/dev/drm/i915/i915_drv.h

109

I915_STATE_WARN((x), "%s", "WARN_ON(" __stringify(x) ")")

sys/dev/drm/i915/intel_display.c

1114

I915_STATE_WARN(cur_state != state,

sys/dev/drm/i915/intel_display.c

1130

I915_STATE_WARN(cur_state != state,

sys/dev/drm/i915/intel_display.c

1150

I915_STATE_WARN(cur_state != state,

sys/dev/drm/i915/intel_display.c

1165

I915_STATE_WARN(cur_state != state,

sys/dev/drm/i915/intel_display.c

1186

I915_STATE_WARN(!(val & FDI_TX_PLL_ENABLE), "FDI TX PLL assertion failure, should be active but is disabled\n");

sys/dev/drm/i915/intel_display.c

1197

I915_STATE_WARN(cur_state != state,

sys/dev/drm/i915/intel_display.c

11973

I915_STATE_WARN(new_conn_state->best_encoder != encoder,

sys/dev/drm/i915/intel_display.c

12003

I915_STATE_WARN(new_conn_state->crtc !=

sys/dev/drm/i915/intel_display.c

12011

I915_STATE_WARN(!!encoder->base.crtc != enabled,

sys/dev/drm/i915/intel_display.c

12020

I915_STATE_WARN(active,

sys/dev/drm/i915/intel_display.c

12055

I915_STATE_WARN(new_crtc_state->active != active,

sys/dev/drm/i915/intel_display.c

12059

I915_STATE_WARN(intel_crtc->active != new_crtc_state->active,

sys/dev/drm/i915/intel_display.c

12067

I915_STATE_WARN(active != new_crtc_state->active,

sys/dev/drm/i915/intel_display.c

12071

I915_STATE_WARN(active && intel_crtc->pipe != pipe,

sys/dev/drm/i915/intel_display.c

12089

I915_STATE_WARN(1, "pipe state doesn't match!\n");

sys/dev/drm/i915/intel_display.c

12126

I915_STATE_WARN(!pll->on && pll->active_mask,

sys/dev/drm/i915/intel_display.c

12128

I915_STATE_WARN(pll->on && !pll->active_mask,

sys/dev/drm/i915/intel_display.c

12130

I915_STATE_WARN(pll->on != active,

sys/dev/drm/i915/intel_display.c

12136

I915_STATE_WARN(pll->active_mask & ~pll->state.crtc_mask,

sys/dev/drm/i915/intel_display.c

12146

I915_STATE_WARN(!(pll->active_mask & crtc_mask),

sys/dev/drm/i915/intel_display.c

12150

I915_STATE_WARN(pll->active_mask & crtc_mask,

sys/dev/drm/i915/intel_display.c

12154

I915_STATE_WARN(!(pll->state.crtc_mask & crtc_mask),

sys/dev/drm/i915/intel_display.c

12158

I915_STATE_WARN(pll->on && memcmp(&pll->state.hw_state,

sys/dev/drm/i915/intel_display.c

12181

I915_STATE_WARN(pll->active_mask & crtc_mask,

sys/dev/drm/i915/intel_display.c

12184

I915_STATE_WARN(pll->state.crtc_mask & crtc_mask,

sys/dev/drm/i915/intel_display.c

1254

I915_STATE_WARN(panel_pipe == pipe && locked,

sys/dev/drm/i915/intel_display.c

1281

I915_STATE_WARN(cur_state != state,

sys/dev/drm/i915/intel_display.c

1293

I915_STATE_WARN(cur_state != state,

sys/dev/drm/i915/intel_display.c

1324

I915_STATE_WARN(enabled,

sys/dev/drm/i915/intel_display.c

1338

I915_STATE_WARN(state && port_pipe == pipe,

sys/dev/drm/i915/intel_display.c

1342

I915_STATE_WARN(HAS_PCH_IBX(dev_priv) && !state && port_pipe == PIPE_B,

sys/dev/drm/i915/intel_display.c

1356

I915_STATE_WARN(state && port_pipe == pipe,

sys/dev/drm/i915/intel_display.c

1360

I915_STATE_WARN(HAS_PCH_IBX(dev_priv) && !state && port_pipe == PIPE_B,

sys/dev/drm/i915/intel_display.c

1374

I915_STATE_WARN(intel_crt_port_enabled(dev_priv, PCH_ADPA, &port_pipe) &&

sys/dev/drm/i915/intel_display.c

1379

I915_STATE_WARN(intel_lvds_port_enabled(dev_priv, PCH_LVDS, &port_pipe) &&

sys/dev/drm/i915/intel_display.c

6412

I915_STATE_WARN(!crtc_state,

sys/dev/drm/i915/intel_display.c

6418

I915_STATE_WARN(!crtc_state->active,

sys/dev/drm/i915/intel_display.c

6424

I915_STATE_WARN(conn_state->best_encoder != &encoder->base,

sys/dev/drm/i915/intel_display.c

6427

I915_STATE_WARN(conn_state->crtc != encoder->base.crtc,

sys/dev/drm/i915/intel_display.c

6430

I915_STATE_WARN(crtc_state && crtc_state->active,

sys/dev/drm/i915/intel_display.c

6432

I915_STATE_WARN(!crtc_state && conn_state->best_encoder,

sys/dev/drm/i915/intel_display.c

9142

I915_STATE_WARN(crtc->active, "CRTC for pipe %c enabled\n",

sys/dev/drm/i915/intel_display.c

9145

I915_STATE_WARN(I915_READ(HSW_PWR_WELL_CTL2),

sys/dev/drm/i915/intel_display.c

9147

I915_STATE_WARN(I915_READ(SPLL_CTL) & SPLL_PLL_ENABLE, "SPLL enabled\n");

sys/dev/drm/i915/intel_display.c

9148

I915_STATE_WARN(I915_READ(WRPLL_CTL(0)) & WRPLL_PLL_ENABLE, "WRPLL1 enabled\n");

sys/dev/drm/i915/intel_display.c

9149

I915_STATE_WARN(I915_READ(WRPLL_CTL(1)) & WRPLL_PLL_ENABLE, "WRPLL2 enabled\n");

sys/dev/drm/i915/intel_display.c

9150

I915_STATE_WARN(I915_READ(PP_STATUS(0)) & PP_ON, "Panel power on\n");

sys/dev/drm/i915/intel_display.c

9151

I915_STATE_WARN(I915_READ(BLC_PWM_CPU_CTL2) & BLM_PWM_ENABLE,

sys/dev/drm/i915/intel_display.c

9154

I915_STATE_WARN(I915_READ(HSW_BLC_PWM2_CTL) & BLM_PWM_ENABLE,

sys/dev/drm/i915/intel_display.c

9156

I915_STATE_WARN(I915_READ(BLC_PWM_PCH_CTL1) & BLM_PCH_PWM_ENABLE,

sys/dev/drm/i915/intel_display.c

9158

I915_STATE_WARN(I915_READ(UTIL_PIN_CTL) & UTIL_PIN_ENABLE,

sys/dev/drm/i915/intel_display.c

9160

I915_STATE_WARN(I915_READ(PCH_GTC_CTL) & PCH_GTC_ENABLE, "PCH GTC enabled\n");

sys/dev/drm/i915/intel_display.c

9168

I915_STATE_WARN(intel_irqs_enabled(dev_priv), "IRQs enabled\n");

sys/dev/drm/i915/intel_dp.c

2393

I915_STATE_WARN(!vdd, "eDP port %c VDD already requested on\n",

sys/dev/drm/i915/intel_dp.c

2472

I915_STATE_WARN(!intel_dp->want_panel_vdd, "eDP port %c VDD not forced on",

sys/dev/drm/i915/intel_dp.c

2703

I915_STATE_WARN(cur_state != state,

sys/dev/drm/i915/intel_dp.c

2714

I915_STATE_WARN(cur_state != state,

sys/dev/drm/i915/intel_dpll_mgr.c

122

I915_STATE_WARN(cur_state != state,

sys/dev/drm/i915/intel_dpll_mgr.c

381

I915_STATE_WARN(!enabled, "PCH refclk assertion failure, should be active but is disabled\n");