sys/dev/drm/amd/amdgpu/dce_v10_0.c

1983

} else if (AMDGPU_TILING_GET(tiling_flags, ARRAY_MODE) == ARRAY_1D_TILED_THIN1) {

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1985

ARRAY_1D_TILED_THIN1);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2025

} else if (AMDGPU_TILING_GET(tiling_flags, ARRAY_MODE) == ARRAY_1D_TILED_THIN1) {

sys/dev/drm/amd/amdgpu/dce_v11_0.c

2027

ARRAY_1D_TILED_THIN1);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1900

} else if (AMDGPU_TILING_GET(tiling_flags, ARRAY_MODE) == ARRAY_1D_TILED_THIN1) {

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

1074

tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

1084

tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

1096

tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

1144

tile[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

1241

tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

1255

tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

1270

tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

1324

tile[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

1427

tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

1437

tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

1449

tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

1497

tile[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

2237

modearray[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

2247

modearray[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

2259

modearray[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

2307

modearray[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

2409

modearray[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

2423

modearray[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

2439

modearray[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

2495

modearray[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

2598

modearray[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

2612

modearray[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

2628

modearray[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

2684

modearray[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

2788

modearray[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

2802

modearray[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

2818

modearray[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

2874

modearray[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

2990

modearray[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

3004

modearray[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

3020

modearray[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

3076

modearray[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

3192

modearray[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

3202

modearray[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

3214

modearray[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

3262

modearray[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

3368

modearray[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

3378

modearray[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

3390

modearray[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

3438

modearray[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/cik.c

2402

tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/cik.c

2415

tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/cik.c

2430

tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/cik.c

2445

tile[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/cik.c

2545

tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/cik.c

2558

tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/cik.c

2573

tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/cik.c

2588

tile[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/cik.c

2689

tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/cik.c

2702

tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/cik.c

2717

tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/cik.c

2732

tile[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/cik.c

2769

tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/cik.c

2782

tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/cik.c

2797

tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/cik.c

2812

tile[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/cik.c

2913

tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/cik.c

2926

tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/cik.c

2941

tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/cik.c

2956

tile[27] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/evergreen_cs.c

307

case ARRAY_1D_TILED_THIN1:

sys/dev/drm/radeon/evergreen_cs.c

328

case ARRAY_1D_TILED_THIN1:

sys/dev/drm/radeon/evergreen_cs.c

883

surf.mode = ARRAY_1D_TILED_THIN1;

sys/dev/drm/radeon/evergreen_cs.c

890

case ARRAY_1D_TILED_THIN1:

sys/dev/drm/radeon/evergreen_cs.c

96

return ARRAY_1D_TILED_THIN1;

sys/dev/drm/radeon/r600_cs.c

276

case ARRAY_1D_TILED_THIN1:

sys/dev/drm/radeon/si.c

2542

tile[4] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/si.c

2587

tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/si.c

2623

tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/si.c

2757

tile[4] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/si.c

2802

tile[9] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |

sys/dev/drm/radeon/si.c

2838

tile[13] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |