sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

1027

REG_UPDATE(HDMI_GC, HDMI_GC_AVMUTE, value);

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.c

647

REG_UPDATE(HDMI_GC, HDMI_GC_AVMUTE, 0);

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.h

146

SE_SF(HDMI_GC, HDMI_GC_AVMUTE, mask_sh),\

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.h

666

uint32_t HDMI_GC;

sys/dev/drm/amd/display/dc/dce/dce_stream_encoder.h

69

SRI(HDMI_GC, DIG, id), \

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

580

REG_UPDATE(HDMI_GC, HDMI_GC_AVMUTE, 0);

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

887

REG_UPDATE(HDMI_GC, HDMI_GC_AVMUTE, value);

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h

133

uint32_t HDMI_GC;

sys/dev/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h

57

SRI(HDMI_GC, DIG, id), \

sys/dev/drm/radeon/evergreen_hdmi.c

418

WREG32_OR(HDMI_GC + offset, HDMI_GC_AVMUTE);

sys/dev/drm/radeon/evergreen_hdmi.c

420

WREG32_AND(HDMI_GC + offset, ~HDMI_GC_AVMUTE);