Symbol: FMT_FRAME_RANDOM_ENABLE
sys/dev/drm/amd/amdgpu/dce_v10_0.c
524
tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_FRAME_RANDOM_ENABLE, 1);
sys/dev/drm/amd/amdgpu/dce_v10_0.c
536
tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_FRAME_RANDOM_ENABLE, 1);
sys/dev/drm/amd/amdgpu/dce_v10_0.c
549
tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_FRAME_RANDOM_ENABLE, 1);
sys/dev/drm/amd/amdgpu/dce_v11_0.c
550
tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_FRAME_RANDOM_ENABLE, 1);
sys/dev/drm/amd/amdgpu/dce_v11_0.c
562
tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_FRAME_RANDOM_ENABLE, 1);
sys/dev/drm/amd/amdgpu/dce_v11_0.c
575
tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_FRAME_RANDOM_ENABLE, 1);
sys/dev/drm/amd/display/dc/dce/dce_opp.c
170
FMT_FRAME_RANDOM_ENABLE, 0,
sys/dev/drm/amd/display/dc/dce/dce_opp.c
237
FMT_FRAME_RANDOM_ENABLE, params->flags.FRAME_RANDOM,
sys/dev/drm/amd/display/dc/dce/dce_opp.h
168
OPP_SF(FMT0_FMT_BIT_DEPTH_CONTROL, FMT_FRAME_RANDOM_ENABLE, mask_sh),\
sys/dev/drm/amd/display/dc/dce/dce_opp.h
213
type FMT_FRAME_RANDOM_ENABLE; \
sys/dev/drm/amd/display/dc/dce/dce_opp.h
97
OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_FRAME_RANDOM_ENABLE, mask_sh),\
sys/dev/drm/amd/display/dc/dcn10/dcn10_opp.c
133
FMT_FRAME_RANDOM_ENABLE, params->flags.FRAME_RANDOM,
sys/dev/drm/amd/display/dc/dcn10/dcn10_opp.c
70
FMT_FRAME_RANDOM_ENABLE, 0,
sys/dev/drm/amd/display/dc/dcn10/dcn10_opp.h
111
type FMT_FRAME_RANDOM_ENABLE; \
sys/dev/drm/amd/display/dc/dcn10/dcn10_opp.h
77
OPP_SF(FMT0_FMT_BIT_DEPTH_CONTROL, FMT_FRAME_RANDOM_ENABLE, mask_sh), \
sys/dev/drm/radeon/cik.c
8790
tmp |= (FMT_FRAME_RANDOM_ENABLE | FMT_HIGHPASS_RANDOM_ENABLE |
sys/dev/drm/radeon/cik.c
8798
tmp |= (FMT_FRAME_RANDOM_ENABLE | FMT_HIGHPASS_RANDOM_ENABLE |
sys/dev/drm/radeon/cik.c
8807
tmp |= (FMT_FRAME_RANDOM_ENABLE | FMT_HIGHPASS_RANDOM_ENABLE |
sys/dev/drm/radeon/evergreen.c
1310
tmp |= (FMT_FRAME_RANDOM_ENABLE | FMT_HIGHPASS_RANDOM_ENABLE |
sys/dev/drm/radeon/evergreen.c
1318
tmp |= (FMT_FRAME_RANDOM_ENABLE | FMT_HIGHPASS_RANDOM_ENABLE |