AMD_CG_STATE_GATE
i = state == AMD_CG_STATE_GATE ? j : adev->num_ip_blocks - j - 1;
amdgpu_device_set_cg_state(adev, AMD_CG_STATE_GATE);
AMD_CG_STATE_GATE);
AMD_CG_STATE_GATE);
if (state == AMD_CG_STATE_GATE)
if (state == AMD_CG_STATE_GATE)
state == AMD_CG_STATE_GATE);
state == AMD_CG_STATE_GATE ? true : false);
if (state == AMD_CG_STATE_GATE)
state == AMD_CG_STATE_GATE);
state == AMD_CG_STATE_GATE);
state == AMD_CG_STATE_GATE ? true : false);
state == AMD_CG_STATE_GATE ? true : false);
state == AMD_CG_STATE_GATE ? true : false);
state == AMD_CG_STATE_GATE ? true : false);
state == AMD_CG_STATE_GATE);
state == AMD_CG_STATE_GATE);
state == AMD_CG_STATE_GATE ? true : false);
state == AMD_CG_STATE_GATE ? true : false);
state == AMD_CG_STATE_GATE ? true : false);
state == AMD_CG_STATE_GATE ? true : false);
state == AMD_CG_STATE_GATE ? true : false);
state == AMD_CG_STATE_GATE ? true : false);
state == AMD_CG_STATE_GATE ? true : false);
state == AMD_CG_STATE_GATE ? true : false);
state == AMD_CG_STATE_GATE ? true : false);
state == AMD_CG_STATE_GATE ? true : false);
state == AMD_CG_STATE_GATE ? true : false);
state == AMD_CG_STATE_GATE ? true : false);
state == AMD_CG_STATE_GATE ? true : false);
state == AMD_CG_STATE_GATE ? true : false);
state == AMD_CG_STATE_GATE ? true : false);
uvd_v5_0_set_clockgating_state(adev, AMD_CG_STATE_GATE);
bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
if (state == AMD_CG_STATE_GATE) {
return vce_v3_0_set_clockgating_state(adev, AMD_CG_STATE_GATE);
bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
state == AMD_CG_STATE_GATE);
state == AMD_CG_STATE_GATE);
state == AMD_CG_STATE_GATE);
state == AMD_CG_STATE_GATE);
state == AMD_CG_STATE_GATE);
state == AMD_CG_STATE_GATE);
state == AMD_CG_STATE_GATE);
state == AMD_CG_STATE_GATE);
AMD_CG_STATE_GATE);
AMD_CG_STATE_GATE);
AMD_CG_STATE_GATE);
AMD_CG_STATE_GATE);
AMD_CG_STATE_GATE);