DP_RECEIVER_CAP_SIZE
u8 dpcd[DP_RECEIVER_CAP_SIZE];
#define DP_DPCD_SIZE DP_RECEIVER_CAP_SIZE
u8 dpcd[DP_RECEIVER_CAP_SIZE];
memcpy(dp_info.dpcd, dig_connector->dpcd, DP_RECEIVER_CAP_SIZE);
void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
int drm_dp_downstream_max_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
const u8 dpcd[DP_RECEIVER_CAP_SIZE],
ret = drm_dp_dpcd_read(mgr->aux, DP_DPCD_REV, mgr->dpcd, DP_RECEIVER_CAP_SIZE);
if (ret != DP_RECEIVER_CAP_SIZE) {
sret = drm_dp_dpcd_read(mgr->aux, DP_DPCD_REV, mgr->dpcd, DP_RECEIVER_CAP_SIZE);
if (sret != DP_RECEIVER_CAP_SIZE) {
ret = drm_dp_dpcd_read(mgr->aux, DP_DPCD_REV, buf, DP_RECEIVER_CAP_SIZE);
seq_printf(m, "dpcd: %*ph\n", DP_RECEIVER_CAP_SIZE, buf);
uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
drm_dp_max_link_rate(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
drm_dp_max_lane_count(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
drm_dp_enhanced_frame_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
drm_dp_tps3_supported(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
drm_dp_tps4_supported(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
drm_dp_training_pattern_mask(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
drm_dp_is_branch(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
int drm_dp_downstream_max_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
void drm_dp_downstream_debug(struct seq_file *m, const u8 dpcd[DP_RECEIVER_CAP_SIZE],
void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
u8 dpcd[DP_RECEIVER_CAP_SIZE];
#define DP_DPCD_SIZE DP_RECEIVER_CAP_SIZE
u8 dpcd[DP_RECEIVER_CAP_SIZE];
memcpy(dp_info.dpcd, dig_connector->dpcd, DP_RECEIVER_CAP_SIZE);
u8 dpcd[DP_RECEIVER_CAP_SIZE];