sys/dev/drm/i915/i915_drv.c

845

DPIO_PHY_IOSF_PORT(DPIO_PHY0) = IOSF_PORT_DPIO_2;

sys/dev/drm/i915/i915_drv.c

848

DPIO_PHY_IOSF_PORT(DPIO_PHY0) = IOSF_PORT_DPIO;

sys/dev/drm/i915/i915_reg.h

3229

#define PHY_POWERGOOD(phy) (((phy) == DPIO_PHY0) ? (1 << 31) : (1 << 30))

sys/dev/drm/i915/intel_dpio_phy.c

157

[DPIO_PHY0] = {

sys/dev/drm/i915/intel_dpio_phy.c

179

[DPIO_PHY0] = {

sys/dev/drm/i915/intel_dpio_phy.c

259

*phy = DPIO_PHY0;

sys/dev/drm/i915/intel_dpio_phy.c

797

!chv_phy_powergate_ch(dev_priv, DPIO_PHY0, DPIO_CH1, true);

sys/dev/drm/i915/intel_dpio_phy.c

945

chv_phy_powergate_ch(dev_priv, DPIO_PHY0, DPIO_CH1, false);

sys/dev/drm/i915/intel_drv.h

1228

return DPIO_PHY0;

sys/dev/drm/i915/intel_runtime_pm.c

1122

if (!dev_priv->chv_phy_assert[DPIO_PHY0])

sys/dev/drm/i915/intel_runtime_pm.c

1123

phy_status_mask &= ~(PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH0) |

sys/dev/drm/i915/intel_runtime_pm.c

1124

PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 0) |

sys/dev/drm/i915/intel_runtime_pm.c

1125

PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 1) |

sys/dev/drm/i915/intel_runtime_pm.c

1126

PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH1) |

sys/dev/drm/i915/intel_runtime_pm.c

1127

PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 0) |

sys/dev/drm/i915/intel_runtime_pm.c

1128

PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 1));

sys/dev/drm/i915/intel_runtime_pm.c

1136

phy_status |= PHY_POWERGOOD(DPIO_PHY0);

sys/dev/drm/i915/intel_runtime_pm.c

1139

if ((phy_control & PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH0)) == 0)

sys/dev/drm/i915/intel_runtime_pm.c

1140

phy_control |= PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH0);

sys/dev/drm/i915/intel_runtime_pm.c

1142

if ((phy_control & PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH1)) == 0)

sys/dev/drm/i915/intel_runtime_pm.c

1143

phy_control |= PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1);

sys/dev/drm/i915/intel_runtime_pm.c

1147

PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH0) |

sys/dev/drm/i915/intel_runtime_pm.c

1148

PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1)))

sys/dev/drm/i915/intel_runtime_pm.c

1149

phy_status |= PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH0);

sys/dev/drm/i915/intel_runtime_pm.c

1157

PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1)) &&

sys/dev/drm/i915/intel_runtime_pm.c

1159

phy_status |= PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH1);

sys/dev/drm/i915/intel_runtime_pm.c

1162

PHY_CH_POWER_DOWN_OVRD(0x3, DPIO_PHY0, DPIO_CH0)))

sys/dev/drm/i915/intel_runtime_pm.c

1163

phy_status |= PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 0);

sys/dev/drm/i915/intel_runtime_pm.c

1165

PHY_CH_POWER_DOWN_OVRD(0xc, DPIO_PHY0, DPIO_CH0)))

sys/dev/drm/i915/intel_runtime_pm.c

1166

phy_status |= PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 1);

sys/dev/drm/i915/intel_runtime_pm.c

1169

PHY_CH_POWER_DOWN_OVRD(0x3, DPIO_PHY0, DPIO_CH1)))

sys/dev/drm/i915/intel_runtime_pm.c

1170

phy_status |= PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 0);

sys/dev/drm/i915/intel_runtime_pm.c

1172

PHY_CH_POWER_DOWN_OVRD(0xc, DPIO_PHY0, DPIO_CH1)))

sys/dev/drm/i915/intel_runtime_pm.c

1173

phy_status |= PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 1);

sys/dev/drm/i915/intel_runtime_pm.c

1225

phy = DPIO_PHY0;

sys/dev/drm/i915/intel_runtime_pm.c

1286

phy = DPIO_PHY0;

sys/dev/drm/i915/intel_runtime_pm.c

1311

enum i915_pipe pipe = phy == DPIO_PHY0 ? PIPE_A : PIPE_C;

sys/dev/drm/i915/intel_runtime_pm.c

2438

.bxt.phy = DPIO_PHY0,

sys/dev/drm/i915/intel_runtime_pm.c

2497

.bxt.phy = DPIO_PHY0,

sys/dev/drm/i915/intel_runtime_pm.c

3620

PHY_LDO_SEQ_DELAY(PHY_LDO_DELAY_600NS, DPIO_PHY0) |

sys/dev/drm/i915/intel_runtime_pm.c

3622

PHY_CH_POWER_MODE(PHY_CH_DEEP_PSR, DPIO_PHY0, DPIO_CH0) |

sys/dev/drm/i915/intel_runtime_pm.c

3623

PHY_CH_POWER_MODE(PHY_CH_DEEP_PSR, DPIO_PHY0, DPIO_CH1) |

sys/dev/drm/i915/intel_runtime_pm.c

3642

PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH0);

sys/dev/drm/i915/intel_runtime_pm.c

3645

PHY_CH_POWER_DOWN_OVRD(mask, DPIO_PHY0, DPIO_CH0);

sys/dev/drm/i915/intel_runtime_pm.c

3652

PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH1);

sys/dev/drm/i915/intel_runtime_pm.c

3655

PHY_CH_POWER_DOWN_OVRD(mask, DPIO_PHY0, DPIO_CH1);

sys/dev/drm/i915/intel_runtime_pm.c

3657

dev_priv->chv_phy_control |= PHY_COM_LANE_RESET_DEASSERT(DPIO_PHY0);

sys/dev/drm/i915/intel_runtime_pm.c

3659

dev_priv->chv_phy_assert[DPIO_PHY0] = false;

sys/dev/drm/i915/intel_runtime_pm.c

3661

dev_priv->chv_phy_assert[DPIO_PHY0] = true;