sys/dev/drm/amd/amdgpu/si_dpm.c

5465

(RREG32(DPG_PIPE_STUTTER_CONTROL) & STUTTER_ENABLE) &&

sys/dev/drm/amd/display/dc/dce/dce_mem_input.c

242

REG_UPDATE_2(DPG_PIPE_STUTTER_CONTROL,

sys/dev/drm/amd/display/dc/dce/dce_mem_input.c

259

REG_UPDATE(DPG_PIPE_STUTTER_CONTROL,

sys/dev/drm/amd/display/dc/dce/dce_mem_input.c

279

REG_UPDATE_2(DPG_PIPE_STUTTER_CONTROL,

sys/dev/drm/amd/display/dc/dce/dce_mem_input.c

308

REG_UPDATE_2(DPG_PIPE_STUTTER_CONTROL,

sys/dev/drm/amd/display/dc/dce/dce_mem_input.c

341

REG_UPDATE_2(DPG_PIPE_STUTTER_CONTROL,

sys/dev/drm/amd/display/dc/dce/dce_mem_input.h

112

uint32_t DPG_PIPE_STUTTER_CONTROL;

sys/dev/drm/amd/display/dc/dce/dce_mem_input.h

181

SFB(blk, DPG_PIPE_STUTTER_CONTROL, STUTTER_ENABLE, mask_sh),\

sys/dev/drm/amd/display/dc/dce/dce_mem_input.h

182

SFB(blk, DPG_PIPE_STUTTER_CONTROL, STUTTER_IGNORE_FBC, mask_sh),\

sys/dev/drm/amd/display/dc/dce/dce_mem_input.h

187

SFB(blk, DPG_PIPE_STUTTER_CONTROL, STUTTER_EXIT_SELF_REFRESH_WATERMARK, mask_sh),\

sys/dev/drm/amd/display/dc/dce/dce_mem_input.h

54

SRI(DPG_PIPE_STUTTER_CONTROL, DMIF_PG, id),\

sys/dev/drm/amd/powerplay/smumgr/fiji_smumgr.c

1209

(PHM_READ_FIELD(hwmgr->device, DPG_PIPE_STUTTER_CONTROL,

sys/dev/drm/amd/powerplay/smumgr/polaris10_smumgr.c

1110

(PHM_READ_FIELD(hwmgr->device, DPG_PIPE_STUTTER_CONTROL,

sys/dev/drm/amd/powerplay/smumgr/tonga_smumgr.c

1021

&& (PHM_READ_FIELD(hwmgr->device, DPG_PIPE_STUTTER_CONTROL, STUTTER_ENABLE) & 0x1)

sys/dev/drm/amd/powerplay/smumgr/vegam_smumgr.c

1016

(PHM_READ_FIELD(hwmgr->device, DPG_PIPE_STUTTER_CONTROL,

sys/dev/drm/radeon/ci_dpm.c

2966

(RREG32(DPG_PIPE_STUTTER_CONTROL) & STUTTER_ENABLE) &&

sys/dev/drm/radeon/si_dpm.c

5006

(RREG32(DPG_PIPE_STUTTER_CONTROL) & STUTTER_ENABLE) &&