Symbol: ABM_SF
sys/dev/drm/amd/display/dc/dce/dce_abm.h
100
ABM_SF(DC_ABM1_IPCSC_COEFF_SEL, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
102
ABM_SF(BL1_PWM_CURRENT_ABM_LEVEL, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
104
ABM_SF(BL1_PWM_TARGET_ABM_LEVEL, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
106
ABM_SF(BL1_PWM_USER_LEVEL, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
108
ABM_SF(DC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
110
ABM_SF(DC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
112
ABM_SF(DC_ABM1_HGLS_REG_READ_PROGRESS, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
114
ABM_SF(DC_ABM1_HGLS_REG_READ_PROGRESS, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
116
ABM_SF(DC_ABM1_HGLS_REG_READ_PROGRESS, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
121
ABM_SF(ABM0_DC_ABM1_HG_MISC_CTRL, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
123
ABM_SF(ABM0_DC_ABM1_HG_MISC_CTRL, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
125
ABM_SF(ABM0_DC_ABM1_HG_MISC_CTRL, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
127
ABM_SF(ABM0_DC_ABM1_IPCSC_COEFF_SEL, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
129
ABM_SF(ABM0_DC_ABM1_IPCSC_COEFF_SEL, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
131
ABM_SF(ABM0_DC_ABM1_IPCSC_COEFF_SEL, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
133
ABM_SF(ABM0_BL1_PWM_CURRENT_ABM_LEVEL, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
135
ABM_SF(ABM0_BL1_PWM_TARGET_ABM_LEVEL, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
137
ABM_SF(ABM0_BL1_PWM_USER_LEVEL, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
139
ABM_SF(ABM0_DC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
141
ABM_SF(ABM0_DC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
143
ABM_SF(ABM0_DC_ABM1_HGLS_REG_READ_PROGRESS, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
145
ABM_SF(ABM0_DC_ABM1_HGLS_REG_READ_PROGRESS, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
147
ABM_SF(ABM0_DC_ABM1_HGLS_REG_READ_PROGRESS, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
74
ABM_SF(BL_PWM_PERIOD_CNTL, BL_PWM_PERIOD, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
75
ABM_SF(BL_PWM_PERIOD_CNTL, BL_PWM_PERIOD_BITCNT, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
76
ABM_SF(BL_PWM_CNTL, BL_ACTIVE_INT_FRAC_CNT, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
77
ABM_SF(BL_PWM_CNTL, BL_PWM_FRACTIONAL_EN, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
78
ABM_SF(BL_PWM_CNTL, BL_PWM_EN, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
79
ABM_SF(BL_PWM_GRP1_REG_LOCK, BL_PWM_GRP1_IGNORE_MASTER_LOCK_EN, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
80
ABM_SF(BL_PWM_GRP1_REG_LOCK, BL_PWM_GRP1_REG_LOCK, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
81
ABM_SF(BL_PWM_GRP1_REG_LOCK, BL_PWM_GRP1_REG_UPDATE_PENDING, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
82
ABM_SF(LVTMA_PWRSEQ_REF_DIV, BL_PWM_REF_DIV, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
83
ABM_SF(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
84
ABM_SF(MASTER_COMM_CMD_REG, MASTER_COMM_CMD_REG_BYTE0, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
85
ABM_SF(MASTER_COMM_CMD_REG, MASTER_COMM_CMD_REG_BYTE1, mask_sh), \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
86
ABM_SF(MASTER_COMM_CMD_REG, MASTER_COMM_CMD_REG_BYTE2, mask_sh)
sys/dev/drm/amd/display/dc/dce/dce_abm.h
90
ABM_SF(DC_ABM1_HG_MISC_CTRL, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
92
ABM_SF(DC_ABM1_HG_MISC_CTRL, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
94
ABM_SF(DC_ABM1_HG_MISC_CTRL, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
96
ABM_SF(DC_ABM1_IPCSC_COEFF_SEL, \
sys/dev/drm/amd/display/dc/dce/dce_abm.h
98
ABM_SF(DC_ABM1_IPCSC_COEFF_SEL, \