sys/dev/drm/radeon/evergreen.c

3895

tmp = RREG32(DMA_RB_CNTL);

sys/dev/drm/radeon/evergreen.c

3897

WREG32(DMA_RB_CNTL, tmp);

sys/dev/drm/radeon/evergreen.c

4004

tmp = RREG32(DMA_RB_CNTL);

sys/dev/drm/radeon/evergreen.c

4006

WREG32(DMA_RB_CNTL, tmp);

sys/dev/drm/radeon/ni.c

1860

tmp = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET);

sys/dev/drm/radeon/ni.c

1862

WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, tmp);

sys/dev/drm/radeon/ni.c

1867

tmp = RREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET);

sys/dev/drm/radeon/ni.c

1869

WREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET, tmp);

sys/dev/drm/radeon/ni_dma.c

164

rb_cntl = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET);

sys/dev/drm/radeon/ni_dma.c

166

WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, rb_cntl);

sys/dev/drm/radeon/ni_dma.c

169

rb_cntl = RREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET);

sys/dev/drm/radeon/ni_dma.c

171

WREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET, rb_cntl);

sys/dev/drm/radeon/ni_dma.c

213

WREG32(DMA_RB_CNTL + reg_offset, rb_cntl);

sys/dev/drm/radeon/ni_dma.c

244

WREG32(DMA_RB_CNTL + reg_offset, rb_cntl | DMA_RB_ENABLE);

sys/dev/drm/radeon/r600.c

1699

tmp = RREG32(DMA_RB_CNTL);

sys/dev/drm/radeon/r600.c

1701

WREG32(DMA_RB_CNTL, tmp);

sys/dev/drm/radeon/r600.c

1830

tmp = RREG32(DMA_RB_CNTL);

sys/dev/drm/radeon/r600.c

1832

WREG32(DMA_RB_CNTL, tmp);

sys/dev/drm/radeon/r600_dma.c

105

WREG32(DMA_RB_CNTL, rb_cntl);

sys/dev/drm/radeon/r600_dma.c

134

WREG32(DMA_RB_CNTL, rb_cntl);

sys/dev/drm/radeon/r600_dma.c

168

WREG32(DMA_RB_CNTL, rb_cntl | DMA_RB_ENABLE);

sys/dev/drm/radeon/r600_dma.c

99

u32 rb_cntl = RREG32(DMA_RB_CNTL);

sys/dev/drm/radeon/si.c

3870

tmp = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET);

sys/dev/drm/radeon/si.c

3872

WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, tmp);

sys/dev/drm/radeon/si.c

3876

tmp = RREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET);

sys/dev/drm/radeon/si.c

3878

WREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET, tmp);

sys/dev/drm/radeon/si.c

4037

tmp = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET);

sys/dev/drm/radeon/si.c

4039

WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, tmp);

sys/dev/drm/radeon/si.c

4041

tmp = RREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET);

sys/dev/drm/radeon/si.c

4043

WREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET, tmp);