sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1021

r = pci_set_dma_mask(adev->pdev, DMA_BIT_MASK(dma_bits));

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1027

r = pci_set_consistent_dma_mask(adev->pdev, DMA_BIT_MASK(dma_bits));

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

1029

pci_set_consistent_dma_mask(adev->pdev, DMA_BIT_MASK(32));

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1147

r = pci_set_dma_mask(adev->pdev, DMA_BIT_MASK(dma_bits));

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1153

r = pci_set_consistent_dma_mask(adev->pdev, DMA_BIT_MASK(dma_bits));

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

1155

pci_set_consistent_dma_mask(adev->pdev, DMA_BIT_MASK(32));

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

984

r = pci_set_dma_mask(adev->pdev, DMA_BIT_MASK(dma_bits));

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

990

r = pci_set_consistent_dma_mask(adev->pdev, DMA_BIT_MASK(dma_bits));

sys/dev/drm/amd/amdgpu/gmc_v9_0.c

992

pci_set_consistent_dma_mask(adev->pdev, DMA_BIT_MASK(32));

sys/dev/drm/i915/i915_drv.c

1477

ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(30));

sys/dev/drm/i915/i915_drv.c

1494

ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));

sys/dev/drm/i915/i915_gem_gtt.c

3409

err = pci_set_dma_mask(pdev, DMA_BIT_MASK(39));

sys/dev/drm/i915/i915_gem_gtt.c

3411

err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(39));

sys/dev/drm/i915/i915_gem_gtt.c

3476

err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));

sys/dev/drm/i915/i915_gem_gtt.c

3478

err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));

sys/dev/drm/i915/intel_lpe_audio.c

113

pinfo.dma_mask = DMA_BIT_MASK(32);

sys/dev/drm/radeon/radeon_device.c

1384

r = pci_set_dma_mask(rdev->pdev, DMA_BIT_MASK(dma_bits));

sys/dev/drm/radeon/radeon_device.c

1390

r = pci_set_consistent_dma_mask(rdev->pdev, DMA_BIT_MASK(dma_bits));

sys/dev/drm/radeon/radeon_device.c

1392

pci_set_consistent_dma_mask(rdev->pdev, DMA_BIT_MASK(32));

sys/dev/netif/iwm/if_iwmreg.h

1838

#define IWM_TX_DMA_MASK DMA_BIT_MASK(36)