sys/dev/drm/radeon/ni.c

1142

WREG32(DMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config);

sys/dev/drm/radeon/ni.c

1779

tmp = RREG32(DMA_STATUS_REG + DMA0_REGISTER_OFFSET);

sys/dev/drm/radeon/ni.c

1860

tmp = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET);

sys/dev/drm/radeon/ni.c

1862

WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, tmp);

sys/dev/drm/radeon/ni.c

880

case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET):

sys/dev/drm/radeon/ni_dma.c

105

reg = DMA_RB_WPTR + DMA0_REGISTER_OFFSET;

sys/dev/drm/radeon/ni_dma.c

164

rb_cntl = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET);

sys/dev/drm/radeon/ni_dma.c

166

WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, rb_cntl);

sys/dev/drm/radeon/ni_dma.c

196

reg_offset = DMA0_REGISTER_OFFSET;

sys/dev/drm/radeon/ni_dma.c

60

reg = DMA_RB_RPTR + DMA0_REGISTER_OFFSET;

sys/dev/drm/radeon/ni_dma.c

84

reg = DMA_RB_WPTR + DMA0_REGISTER_OFFSET;

sys/dev/drm/radeon/si.c

1308

case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET):

sys/dev/drm/radeon/si.c

3268

WREG32(DMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config);

sys/dev/drm/radeon/si.c

3788

tmp = RREG32(DMA_STATUS_REG + DMA0_REGISTER_OFFSET);

sys/dev/drm/radeon/si.c

3870

tmp = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET);

sys/dev/drm/radeon/si.c

3872

WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, tmp);

sys/dev/drm/radeon/si.c

4037

tmp = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET);

sys/dev/drm/radeon/si.c

4039

WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, tmp);

sys/dev/drm/radeon/si.c

5525

offset = DMA0_REGISTER_OFFSET;

sys/dev/drm/radeon/si.c

5537

offset = DMA0_REGISTER_OFFSET;

sys/dev/drm/radeon/si.c

5944

tmp = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET) & ~TRAP_ENABLE;

sys/dev/drm/radeon/si.c

5945

WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, tmp);

sys/dev/drm/radeon/si.c

6060

dma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET) & ~TRAP_ENABLE;

sys/dev/drm/radeon/si.c

6093

WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, dma_cntl);