sys/dev/drm/amd/amdgpu/amdgpu.h

608

unsigned long used[DIV_ROUND_UP(AMDGPU_MAX_WB, BITS_PER_LONG)];

sys/dev/drm/amd/amdgpu/amdgpu_gem.c

760

DIV_ROUND_UP(args->bpp, 8), 0);

sys/dev/drm/amd/amdgpu/amdgpu_pll.c

227

unsigned tmp = DIV_ROUND_UP(fb_div_min, fb_div);

sys/dev/drm/amd/amdgpu/amdgpu_pll.c

56

tmp = DIV_ROUND_UP(nom_min, *nom);

sys/dev/drm/amd/amdgpu/amdgpu_pll.c

63

tmp = DIV_ROUND_UP(den_min, *den);

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

2098

num_loops = DIV_ROUND_UP(byte_count, max_bytes);

sys/dev/drm/amd/amdgpu/amdgpu_ttm.c

2185

num_loops += DIV_ROUND_UP(byte_count, max_bytes);

sys/dev/drm/amd/amdgpu/amdgpu_vm.c

2982

tmp = DIV_ROUND_UP(fls64(tmp) - 1, 9) - 1;

sys/dev/drm/amd/amdgpu/amdgpu_vram_mgr.c

185

num_nodes = DIV_ROUND_UP(mem->num_pages, pages_per_node);

sys/dev/drm/amd/amdgpu/dce_v10_0.c

1108

lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay);

sys/dev/drm/amd/amdgpu/dce_v11_0.c

1134

lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay);

sys/dev/drm/amd/amdgpu/dce_v8_0.c

1043

lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4539

value = DIV_ROUND_UP(value * 100, golden_value);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

4581

value = DIV_ROUND_UP(value * 100, golden_value);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4540

value = DIV_ROUND_UP(value * 100, golden_value);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

4591

value = DIV_ROUND_UP(value * 100, golden_value);

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2254

value = DIV_ROUND_UP(value * 100, golden_value);

sys/dev/drm/amd/powerplay/hwmgr/vega12_hwmgr.c

2275

value = DIV_ROUND_UP(value * 100, golden_value);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1332

value = DIV_ROUND_UP(value * 100, golden_value);

sys/dev/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

1378

value = DIV_ROUND_UP(value * 100, golden_value);

sys/dev/drm/drm_dp_helper.c

744

return DIV_ROUND_UP((I2C_START_LEN + I2C_ADDR_LEN +

sys/dev/drm/drm_dp_helper.c

761

return DIV_ROUND_UP(i2c_time_us, aux_time_us + AUX_RETRY_INTERVAL);

sys/dev/drm/drm_dp_mst_topology.c

2584

num_slots = DIV_ROUND_UP(pbn, mgr->pbn_div);

sys/dev/drm/drm_dp_mst_topology.c

2636

req_slots = DIV_ROUND_UP(pbn, mgr->pbn_div);

sys/dev/drm/drm_dp_mst_topology.c

2717

DIV_ROUND_UP(pbn, mgr->pbn_div), ret);

sys/dev/drm/drm_dumb_buffers.c

70

cpp = DIV_ROUND_UP(args->bpp, 8);

sys/dev/drm/drm_edid.c

4017

DIV_ROUND_UP(drm_eld_calc_baseline_block_size(eld), 4);

sys/dev/drm/drm_fb_helper.c

1086

y2 = min_t(u32, DIV_ROUND_UP(max, info->fix.line_length),

sys/dev/drm/drm_framebuffer.c

153

return DIV_ROUND_UP(width, format->hsub);

sys/dev/drm/drm_framebuffer.c

162

return DIV_ROUND_UP(height, format->vsub);

sys/dev/drm/drm_gem_framebuffer_helper.c

315

DIV_ROUND_UP(sizes->surface_bpp, 8);

sys/dev/drm/drm_rect.c

133

return DIV_ROUND_UP(src, dst);

sys/dev/drm/i915/i915_drv.c

1277

mem_freq_khz = DIV_ROUND_UP((val & SKL_REQ_DATA_MASK) *

sys/dev/drm/i915/i915_drv.c

1302

mem_freq_khz = DIV_ROUND_UP((val & BXT_REQ_DATA_MASK) *

sys/dev/drm/i915/i915_drv.h

159

return DIV_ROUND_UP(fp.val, 1 << 16);

sys/dev/drm/i915/i915_drv.h

196

return DIV_ROUND_UP(val.val, d.val);

sys/dev/drm/i915/i915_gem.c

772

args->pitch = ALIGN(args->width * DIV_ROUND_UP(args->bpp, 8), 64);

sys/dev/drm/i915/i915_gpu_error.c

972

num_pages = DIV_ROUND_UP(10 * num_pages, 8); /* worstcase zlib growth */

sys/dev/drm/i915/i915_irq.c

1015

vbl_start = DIV_ROUND_UP(vbl_start, 2);

sys/dev/drm/i915/i915_irq.c

834

vbl_start = DIV_ROUND_UP(vbl_start, 2);

sys/dev/drm/i915/i915_query.c

30

DIV_ROUND_UP(sseu->max_subslices,

sys/dev/drm/i915/i915_query.c

33

DIV_ROUND_UP(sseu->max_eus_per_subslice, BITS_PER_BYTE);

sys/dev/drm/i915/i915_query.c

62

topo.subslice_stride = DIV_ROUND_UP(sseu->max_subslices, BITS_PER_BYTE);

sys/dev/drm/i915/i915_query.c

65

DIV_ROUND_UP(sseu->max_eus_per_subslice, BITS_PER_BYTE);

sys/dev/drm/i915/icl_dsi.c

42

esc_clk_div_m = DIV_ROUND_UP(afe_clk_khz, DSI_MAX_ESC_CLK);

sys/dev/drm/i915/intel_cdclk.c

1206

return DIV_ROUND_UP(cdclk, 25000);

sys/dev/drm/i915/intel_cdclk.c

2142

return DIV_ROUND_UP(pixel_rate, 2);

sys/dev/drm/i915/intel_cdclk.c

2147

return DIV_ROUND_UP(pixel_rate * 100, 95);

sys/dev/drm/i915/intel_cdclk.c

2149

return DIV_ROUND_UP(pixel_rate * 100, 90);

sys/dev/drm/i915/intel_cdclk.c

2165

min_cdclk = DIV_ROUND_UP(min_cdclk * 100, 95);

sys/dev/drm/i915/intel_cdclk.c

2645

DIV_ROUND_UP(dev_priv->cdclk.hw.cdclk, 1000));

sys/dev/drm/i915/intel_device_info.c

268

DIV_ROUND_UP(sseu->eu_total,

sys/dev/drm/i915/intel_device_info.c

401

DIV_ROUND_UP(sseu->eu_total,

sys/dev/drm/i915/intel_device_info.c

504

DIV_ROUND_UP(sseu->eu_total,

sys/dev/drm/i915/intel_device_info.h

205

int subslice_stride = DIV_ROUND_UP(sseu->max_eus_per_subslice,

sys/dev/drm/i915/intel_device_info.h

219

i < DIV_ROUND_UP(sseu->max_eus_per_subslice, BITS_PER_BYTE); i++) {

sys/dev/drm/i915/intel_device_info.h

233

i < DIV_ROUND_UP(sseu->max_eus_per_subslice, BITS_PER_BYTE); i++) {

sys/dev/drm/i915/intel_display.c

2585

rot_info->plane[i].stride = DIV_ROUND_UP(fb->pitches[i], tile_width * cpp);

sys/dev/drm/i915/intel_display.c

2586

rot_info->plane[i].width = DIV_ROUND_UP(x + width, tile_width);

sys/dev/drm/i915/intel_display.c

2587

rot_info->plane[i].height = DIV_ROUND_UP(y + height, tile_height);

sys/dev/drm/i915/intel_display.c

2635

size = DIV_ROUND_UP((y + height) * fb->pitches[i] +

sys/dev/drm/i915/intel_display.c

8618

return DIV_ROUND_UP(bps, link_bw * 8);

sys/dev/drm/i915/intel_dp.c

223

return DIV_ROUND_UP(pixel_clock * bpp, 8);

sys/dev/drm/i915/intel_dp.c

5900

#define get_delay(field) (DIV_ROUND_UP(final->field, 10))

sys/dev/drm/i915/intel_dp.c

5982

pp_div |= (DIV_ROUND_UP(seq->t11_t12, 1000)

sys/dev/drm/i915/intel_dp.c

5986

pp_div |= (DIV_ROUND_UP(seq->t11_t12, 1000)

sys/dev/drm/i915/intel_dsi_vbt.c

554

pclk += DIV_ROUND_UP(mode->vtotal *

sys/dev/drm/i915/intel_dsi_vbt.c

574

burst_mode_ratio = DIV_ROUND_UP(

sys/dev/drm/i915/intel_dsi_vbt.c

578

pclk = DIV_ROUND_UP(pclk * burst_mode_ratio, 100);

sys/dev/drm/i915/intel_dsi_vbt.c

632

intel_dsi->lp_byte_clk = DIV_ROUND_UP(tlpx_ns * ui_den, 8 * ui_num);

sys/dev/drm/i915/intel_dsi_vbt.c

648

prepare_cnt = DIV_ROUND_UP(ths_prepare_ns * ui_den, ui_num * mul);

sys/dev/drm/i915/intel_dsi_vbt.c

656

exit_zero_cnt = DIV_ROUND_UP(

sys/dev/drm/i915/intel_dsi_vbt.c

676

clk_zero_cnt = DIV_ROUND_UP(

sys/dev/drm/i915/intel_dsi_vbt.c

687

trail_cnt = DIV_ROUND_UP(tclk_trail_ns * ui_den, ui_num * mul);

sys/dev/drm/i915/intel_dsi_vbt.c

708

tlpx_ui = DIV_ROUND_UP(tlpx_ns * ui_den, ui_num);

sys/dev/drm/i915/intel_dsi_vbt.c

713

lp_to_hs_switch = DIV_ROUND_UP(4 * tlpx_ui + prepare_cnt * mul +

sys/dev/drm/i915/intel_dsi_vbt.c

716

hs_to_lp_switch = DIV_ROUND_UP(mipi_config->ths_trail + 2 * tlpx_ui, 8);

sys/dev/drm/i915/intel_dsi_vbt.c

731

DIV_ROUND_UP(

sys/dev/drm/i915/intel_dsi_vbt.c

746

DIV_ROUND_UP(2 * tlpx_ui + trail_cnt * 2 + 8,

sys/dev/drm/i915/intel_fbc.c

839

params->gen9_wa_cfb_stride = DIV_ROUND_UP(cache->plane.src_w,

sys/dev/drm/i915/intel_fbdev.c

137

DIV_ROUND_UP(sizes->surface_bpp, 8), 64);

sys/dev/drm/i915/intel_lvds.c

228

val |= (DIV_ROUND_UP(pps->t4, 1000) + 1) <<

sys/dev/drm/i915/intel_opregion.c

475

asle->cblv = DIV_ROUND_UP(bclp * 100, 255) | ASLE_CBLV_VALID;

sys/dev/drm/i915/intel_panel.c

1779

panel->backlight.level = DIV_ROUND_UP(

sys/dev/drm/i915/intel_panel.c

527

return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);

sys/dev/drm/i915/intel_panel.c

600

int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);

sys/dev/drm/i915/intel_pm.c

1149

wm = DIV_ROUND_UP(wm, 64) + 2;

sys/dev/drm/i915/intel_pm.c

1580

ret = DIV_ROUND_UP(ret, 64);

sys/dev/drm/i915/intel_pm.c

1697

fifo_extra = DIV_ROUND_UP(fifo_left, num_active_planes ?: 1);

sys/dev/drm/i915/intel_pm.c

2213

entries = DIV_ROUND_UP(entries, I915_FIFO_LINE_SIZE);

sys/dev/drm/i915/intel_pm.c

2224

entries = DIV_ROUND_UP(entries,

sys/dev/drm/i915/intel_pm.c

2374

entries = DIV_ROUND_UP(entries, wm_info->cacheline_size);

sys/dev/drm/i915/intel_pm.c

2437

ret = DIV_ROUND_UP(ret, 64) + 2;

sys/dev/drm/i915/intel_pm.c

2453

ret = DIV_ROUND_UP(ret, 64) + 2;

sys/dev/drm/i915/intel_pm.c

2472

return DIV_ROUND_UP(pri_val * 64, horiz_pixels * cpp) + 2;

sys/dev/drm/i915/intel_pm.c

2992

wm[level] = max_t(uint16_t, wm[level], DIV_ROUND_UP(min, 5));

sys/dev/drm/i915/intel_pm.c

4325

return DIV_ROUND_UP((4 * src_w * plane_bpp), 512) * min_scanlines/4 + 3;

sys/dev/drm/i915/intel_pm.c

4508

wm_intermediate_val = DIV_ROUND_UP(wm_intermediate_val,

sys/dev/drm/i915/intel_pm.c

4638

interm_pbpl = DIV_ROUND_UP(wp->plane_bytes_per_line *

sys/dev/drm/i915/intel_pm.c

4648

interm_pbpl = DIV_ROUND_UP(wp->plane_bytes_per_line,

sys/dev/drm/i915/intel_pm.c

4652

interm_pbpl = DIV_ROUND_UP(wp->plane_bytes_per_line,

sys/dev/drm/i915/intel_pm.c

4767

min_disp_buf_needed = DIV_ROUND_UP(res_blocks * 11, 10);

sys/dev/drm/i915/intel_pm.c

761

entries = DIV_ROUND_UP(entries, wm->cacheline_size) +

sys/dev/drm/i915/intel_ringbuffer.c

1018

*cs++ = DIV_ROUND_UP(len, 4096) << 16 | 4096;

sys/dev/drm/i915/intel_sprite.c

51

return DIV_ROUND_UP(usecs * adjusted_mode->crtc_clock,

sys/dev/drm/i915/intel_sprite.c

90

vblank_start = DIV_ROUND_UP(vblank_start, 2);

sys/dev/drm/i915/vlv_dsi.c

42

return DIV_ROUND_UP(DIV_ROUND_UP(pixels * bpp * burst_mode_ratio,

sys/dev/drm/i915/vlv_dsi.c

50

return DIV_ROUND_UP((clk_hs * lane_count * 8 * 100),

sys/dev/drm/i915/vlv_dsi_pll.c

398

txesc1_div = DIV_ROUND_UP(div1_value, 2);

sys/dev/drm/i915/vlv_dsi_pll.c

400

txesc1_div = DIV_ROUND_UP(div1_value, 4);

sys/dev/drm/i915/vlv_dsi_pll.c

402

txesc1_div = DIV_ROUND_UP(div1_value, 6);

sys/dev/drm/i915/vlv_dsi_pll.c

404

txesc1_div = DIV_ROUND_UP(div1_value, 8);

sys/dev/drm/i915/vlv_dsi_pll.c

409

div2_value = DIV_ROUND_UP(div1_value, txesc1_div);

sys/dev/drm/i915/vlv_dsi_pll.c

449

tx_div = DIV_ROUND_UP(dsi_rate, 20000) - 1;

sys/dev/drm/i915/vlv_dsi_pll.c

454

rx_div = DIV_ROUND_UP(dsi_rate, 150000) - 1;

sys/dev/drm/i915/vlv_dsi_pll.c

490

dsi_ratio = DIV_ROUND_UP(dsi_clk * 2, BXT_REF_CLOCK_KHZ);

sys/dev/drm/include/linux/bitmap.h

42

int chunks = DIV_ROUND_UP(nbits, BITS_PER_LONG);

sys/dev/drm/include/linux/kernel.h

60

#define DIV_ROUND_UP_ULL(X, N) DIV_ROUND_UP((unsigned long long)(X), (N))

sys/dev/drm/radeon/cik.c

3687

num_loops = DIV_ROUND_UP(size_in_bytes, 0x1fffff);

sys/dev/drm/radeon/cik.c

9362

radeon_crtc->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay);

sys/dev/drm/radeon/cik_sdma.c

593

num_loops = DIV_ROUND_UP(size_in_bytes, 0x1fffff);

sys/dev/drm/radeon/evergreen.c

2262

radeon_crtc->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay);

sys/dev/drm/radeon/evergreen_dma.c

122

num_loops = DIV_ROUND_UP(size_in_dw, 0xfffff);

sys/dev/drm/radeon/r100.c

3655

rdev->mode_info.crtcs[0]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode1->crtc_hdisplay);

sys/dev/drm/radeon/r100.c

3658

rdev->mode_info.crtcs[1]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode2->crtc_hdisplay);

sys/dev/drm/radeon/r100.c

905

num_loops = DIV_ROUND_UP(num_gpu_pages, 8191);

sys/dev/drm/radeon/r200.c

98

num_loops = DIV_ROUND_UP(size, 0x1FFFFF);

sys/dev/drm/radeon/r600.c

2989

num_loops = DIV_ROUND_UP(size_in_bytes, 0x1fffff);

sys/dev/drm/radeon/r600_dma.c

458

num_loops = DIV_ROUND_UP(size_in_dw, 0xFFFE);

sys/dev/drm/radeon/radeon_display.c

1067

unsigned tmp = DIV_ROUND_UP(fb_div_min, fb_div);

sys/dev/drm/radeon/radeon_display.c

893

tmp = DIV_ROUND_UP(nom_min, *nom);

sys/dev/drm/radeon/radeon_display.c

900

tmp = DIV_ROUND_UP(den_min, *den);

sys/dev/drm/radeon/radeon_gem.c

765

DIV_ROUND_UP(args->bpp, 8), 0);

sys/dev/drm/radeon/radeon_legacy_crtc.c

475

crtc_pitch = DIV_ROUND_UP(pitch_pixels * target_fb->format->cpp[0] * 8,

sys/dev/drm/radeon/rs690.c

251

rdev->mode_info.crtcs[0]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode1->crtc_hdisplay);

sys/dev/drm/radeon/rs690.c

254

rdev->mode_info.crtcs[1]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode2->crtc_hdisplay);

sys/dev/drm/radeon/rv770_dma.c

58

num_loops = DIV_ROUND_UP(size_in_dw, 0xFFFF);

sys/dev/drm/radeon/si.c

2417

radeon_crtc->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode->crtc_hdisplay);

sys/dev/drm/radeon/si_dma.c

247

num_loops = DIV_ROUND_UP(size_in_bytes, 0xfffff);