sys/dev/drm/amd/display/dc/core/dc_link_dp.c

120

DC_LOG_HW_LINK_TRAINING("%s\n %x rate = %x\n %x lane = %x\n %x spread = %x\n",

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

154

DC_LOG_HW_LINK_TRAINING("%s: Invalid HW Training pattern: %d\n",

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

186

DC_LOG_HW_LINK_TRAINING("%s\n %x pattern = %x\n",

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

220

DC_LOG_HW_LINK_TRAINING("%s:\n %x VS set = %x PE set = %x max VS Reached = %x max PE Reached = %x\n",

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

456

DC_LOG_HW_LINK_TRAINING("%s:\n%x Lane01Status = %x\n %x Lane23Status = %x\n ",

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

461

DC_LOG_HW_LINK_TRAINING("%s:\n %x Lane01AdjustRequest = %x\n %x Lane23AdjustRequest = %x\n",

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

554

DC_LOG_HW_LINK_TRAINING("%s\n %x VS set = %x PE set = %x max VS Reached = %x max PE Reached = %x\n",

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

69

DC_LOG_HW_LINK_TRAINING("%s:\n wait = %d\n",

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

84

DC_LOG_HW_LINK_TRAINING("%s\n %x pattern = %x\n",