sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

761

ps->uvd_clocks.DCLK = le32_to_cpu(pnon_clock_info->ulDCLK);

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

764

ps->uvd_clocks.DCLK = 0;

sys/dev/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

781

smu10_ps->uvd_clocks.dclk = ps->uvd_clocks.DCLK;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3160

power_state->uvd_clocks.DCLK = 0;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3253

ps->uvd_clks.dclk = state->uvd_clocks.DCLK;

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3401

ps->uvd_clks.dclk = state->uvd_clocks.DCLK;

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

1392

smu8_ps->uvd_clocks.dclk = ps->uvd_clocks.DCLK;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3021

power_state->uvd_clocks.DCLK = 0;

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3088

ps->uvd_clks.dclk = state->uvd_clocks.DCLK;

sys/dev/drm/amd/powerplay/inc/power_state.h

137

uint32_t DCLK;

sys/dev/drm/i915/intel_pm.c

7206

min_ring_freq = I915_READ(DCLK) & 0xf;