sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4248

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4249

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4250

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4251

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4252

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4253

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4254

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4255

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4256

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_GPR_ALLOC);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4257

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_LDS_ALLOC);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4258

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TRAPSTS);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4259

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4260

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_LO);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4261

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_HI);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4262

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_LO);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4263

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_HI);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4264

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_DBG0);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4265

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5295

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5296

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5297

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5298

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5299

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5300

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5301

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5302

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5303

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_GPR_ALLOC);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5304

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_LDS_ALLOC);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5305

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TRAPSTS);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5306

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5307

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_LO);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5308

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_HI);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5309

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_LO);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5310

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_HI);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5311

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_DBG0);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5312

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1337

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1338

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1339

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1340

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1341

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1342

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1343

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1344

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1345

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_GPR_ALLOC);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1346

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_LDS_ALLOC);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1347

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TRAPSTS);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1348

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1349

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_DBG0);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1350

dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0);