vlv_dpio_read
u32 vlv_dpio_read(struct drm_i915_private *dev_priv, enum i915_pipe pipe, int reg);
tmp = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW14(port));
val = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW14(port));
reg_val = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW9(1));
reg_val = vlv_dpio_read(dev_priv, pipe, VLV_REF_DW13);
reg_val = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW9(1));
reg_val = vlv_dpio_read(dev_priv, pipe, VLV_REF_DW13);
reg_val = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW8(pipe));
coreclk = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW7(pipe));
dpio_val = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW3(port));
dpio_val = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW9(port));
dpio_val = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW8(port));
vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW14(port)) |
mdiv = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW3(pipe));
cmn_dw13 = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW13(port));
pll_dw0 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW0(port));
pll_dw1 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW1(port));
pll_dw2 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW2(port));
pll_dw3 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW3(port));
val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW8(port));
val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW10(ch));
val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW10(ch));
val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW9(ch));
val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW9(ch));
val = vlv_dpio_read(dev_priv, pipe, CHV_TX_DW4(ch, i));
val = vlv_dpio_read(dev_priv, pipe, CHV_TX_DW2(ch, i));
val = vlv_dpio_read(dev_priv, pipe, CHV_TX_DW3(ch, i));
val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW10(ch));
val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW10(ch));
val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW0(ch));
val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW0(ch));
val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW1(ch));
val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW1(ch));
val = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW5_CH0);
val = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW1_CH1);
val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW8(ch));
val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW8(ch));
val = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW19(ch));
val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW11(ch));
val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW11(ch));
val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW11(ch));
val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW11(ch));
val = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW5_CH0);
val = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW1_CH1);
tmp = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW28);
tmp = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW6_CH1);
tmp = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW30);
val = vlv_dpio_read(dev_priv, pipe, reg);