Symbol: v4
crypto/libressl/crypto/x509/x509_utl.c
1195
ipv4_from_asc(unsigned char *v4, const char *in)
crypto/libressl/crypto/x509/x509_utl.c
1203
v4[0] = a0;
crypto/libressl/crypto/x509/x509_utl.c
1204
v4[1] = a1;
crypto/libressl/crypto/x509/x509_utl.c
1205
v4[2] = a2;
crypto/libressl/crypto/x509/x509_utl.c
1206
v4[3] = a3;
crypto/libressl/crypto/x509/x509_utl.c
77
static int ipv4_from_asc(unsigned char *v4, const char *in);
crypto/openssh/addr.c
123
memcpy(&xa->v4, &in4->sin_addr, sizeof(xa->v4));
crypto/openssh/addr.c
151
n->v4.s_addr = ~n->v4.s_addr;
crypto/openssh/addr.c
181
n->v4.s_addr = htonl((0xffffffff << (32 - l)) & 0xffffffff);
crypto/openssh/addr.c
219
dst->v4.s_addr &= b->v4.s_addr;
crypto/openssh/addr.c
242
dst->v4.s_addr |= b->v4.s_addr;
crypto/openssh/addr.c
267
if (a->v4.s_addr == b->v4.s_addr)
crypto/openssh/addr.c
269
return (ntohl(a->v4.s_addr) > ntohl(b->v4.s_addr) ? 1 : -1);
crypto/openssh/addr.c
293
return (a->v4.s_addr == 0 ? 0 : -1);
crypto/openssh/addr.c
313
a->v4.s_addr = htonl(ntohl(a->v4.s_addr) + 1);
crypto/openssh/addr.c
83
memcpy(&in4->sin_addr, &xa->v4, sizeof(in4->sin_addr));
crypto/openssh/addr.h
28
struct in_addr v4;
crypto/openssh/addr.h
35
#define v4 xa.v4
sys/dev/drm/amd/amdgpu/amdgpu_atombios.c
1006
struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 v4;
sys/dev/drm/amd/amdgpu/amdgpu_atombios.c
1073
args.v4.ulClock = cpu_to_le32(clock); /* 10 khz */
sys/dev/drm/amd/amdgpu/amdgpu_atombios.c
1077
dividers->post_divider = dividers->post_div = args.v4.ucPostDiv;
sys/dev/drm/amd/amdgpu/amdgpu_atombios.c
1078
dividers->real_clock = le32_to_cpu(args.v4.ulClock);
sys/dev/drm/amd/amdgpu/atombios_encoders.c
1066
args.v4.ucAction = action;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
1068
args.v4.usInitInfo = cpu_to_le16(connector_object_id);
sys/dev/drm/amd/amdgpu/atombios_encoders.c
1070
args.v4.asMode.ucLaneSel = lane_num;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
1071
args.v4.asMode.ucLaneSet = lane_set;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
1074
args.v4.usPixelClock = cpu_to_le16(dp_clock / 10);
sys/dev/drm/amd/amdgpu/atombios_encoders.c
1076
args.v4.usPixelClock = cpu_to_le16((amdgpu_encoder->pixel_clock / 2) / 10);
sys/dev/drm/amd/amdgpu/atombios_encoders.c
1078
args.v4.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10);
sys/dev/drm/amd/amdgpu/atombios_encoders.c
1082
args.v4.ucLaneNum = dp_lane_count;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
1084
args.v4.ucLaneNum = 8;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
1086
args.v4.ucLaneNum = 4;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
1089
args.v4.acConfig.ucLinkSel = 1;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
1091
args.v4.acConfig.ucEncoderSel = 1;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
1100
args.v4.acConfig.ucRefClkSource = ENCODER_REFCLK_SRC_EXTCLK;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
1102
args.v4.acConfig.ucRefClkSource = ENCODER_REFCLK_SRC_DCPLL;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
1104
args.v4.acConfig.ucRefClkSource = pll_id;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
1108
args.v4.acConfig.ucTransmitterSel = 0;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
1111
args.v4.acConfig.ucTransmitterSel = 1;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
1114
args.v4.acConfig.ucTransmitterSel = 2;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
1119
args.v4.acConfig.fCoherentMode = 1; /* DP requires coherent */
sys/dev/drm/amd/amdgpu/atombios_encoders.c
1122
args.v4.acConfig.fCoherentMode = 1;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
1124
args.v4.acConfig.fDualLinkConnector = 1;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
637
DIG_ENCODER_CONTROL_PARAMETERS_V4 v4;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
735
args.v4.ucAction = action;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
736
args.v4.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10);
sys/dev/drm/amd/amdgpu/atombios_encoders.c
738
args.v4.ucPanelMode = panel_mode;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
740
args.v4.ucEncoderMode = amdgpu_atombios_encoder_get_encoder_mode(encoder);
sys/dev/drm/amd/amdgpu/atombios_encoders.c
742
if (ENCODER_MODE_IS_DP(args.v4.ucEncoderMode))
sys/dev/drm/amd/amdgpu/atombios_encoders.c
743
args.v4.ucLaneNum = dp_lane_count;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
745
args.v4.ucLaneNum = 8;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
747
args.v4.ucLaneNum = 4;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
749
if (ENCODER_MODE_IS_DP(args.v4.ucEncoderMode)) {
sys/dev/drm/amd/amdgpu/atombios_encoders.c
759
args.v4.acConfig.ucDigSel = dig->dig_encoder;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
760
args.v4.ucBitPerColor = amdgpu_atombios_encoder_get_bpc(encoder);
sys/dev/drm/amd/amdgpu/atombios_encoders.c
762
args.v4.ucHPD_ID = 0;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
764
args.v4.ucHPD_ID = hpd_id + 1;
sys/dev/drm/amd/amdgpu/atombios_encoders.c
825
DIG_TRANSMITTER_CONTROL_PARAMETERS_V4 v4;
sys/dev/drm/amd/display/dc/calcs/dcn_calc_math.c
90
float dcn_bw_max5(float v1, float v2, float v3, float v4, float v5)
sys/dev/drm/amd/display/dc/calcs/dcn_calc_math.c
92
return dcn_bw_max3(v1, v2, v3) > dcn_bw_max2(v4, v5) ? dcn_bw_max3(v1, v2, v3) : dcn_bw_max2(v4, v5);
sys/dev/drm/amd/display/dc/calcs/dcn_calc_math.h
36
float dcn_bw_max5(float v1, float v2, float v3, float v4, float v5);
sys/dev/drm/amd/display/dc/inc/reg_helper.h
100
FN(reg, f4), v4,\
sys/dev/drm/amd/display/dc/inc/reg_helper.h
104
#define REG_SET_7(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
110
FN(reg, f4), v4,\
sys/dev/drm/amd/display/dc/inc/reg_helper.h
115
#define REG_SET_8(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
121
FN(reg, f4), v4,\
sys/dev/drm/amd/display/dc/inc/reg_helper.h
127
#define REG_SET_9(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, f5, \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
133
FN(reg, f4), v4, \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
140
#define REG_SET_10(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, f5, \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
146
FN(reg, f4), v4, \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
171
#define REG_GET_4(reg_name, f1, v1, f2, v2, f3, v3, f4, v4) \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
176
FN(reg_name, f4), v4)
sys/dev/drm/amd/display/dc/inc/reg_helper.h
178
#define REG_GET_5(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5) \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
183
FN(reg_name, f4), v4, \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
186
#define REG_GET_6(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6) \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
191
FN(reg_name, f4), v4, \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
195
#define REG_GET_7(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7) \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
200
FN(reg_name, f4), v4, \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
205
#define REG_GET_8(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8) \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
210
FN(reg_name, f4), v4, \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
246
#define REG_UPDATE_4(reg, f1, v1, f2, v2, f3, v3, f4, v4) \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
251
FN(reg, f4), v4)
sys/dev/drm/amd/display/dc/inc/reg_helper.h
253
#define REG_UPDATE_5(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5) \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
258
FN(reg, f4), v4, \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
261
#define REG_UPDATE_6(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6) \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
266
FN(reg, f4), v4, \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
270
#define REG_UPDATE_7(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7) \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
275
FN(reg, f4), v4, \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
280
#define REG_UPDATE_8(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8) \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
285
FN(reg, f4), v4, \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
291
#define REG_UPDATE_9(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9) \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
296
FN(reg, f4), v4, \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
303
#define REG_UPDATE_10(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10, v10)\
sys/dev/drm/amd/display/dc/inc/reg_helper.h
308
FN(reg, f4), v4, \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
316
#define REG_UPDATE_14(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10,\
sys/dev/drm/amd/display/dc/inc/reg_helper.h
322
FN(reg, f4), v4, \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
334
#define REG_UPDATE_19(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10,\
sys/dev/drm/amd/display/dc/inc/reg_helper.h
340
FN(reg, f4), v4, \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
357
#define REG_UPDATE_20(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10,\
sys/dev/drm/amd/display/dc/inc/reg_helper.h
363
FN(reg, f4), v4, \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
78
#define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
83
FN(reg, f4), v4)
sys/dev/drm/amd/display/dc/inc/reg_helper.h
85
#define REG_SET_5(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \
sys/dev/drm/amd/display/dc/inc/reg_helper.h
91
FN(reg, f4), v4,\
sys/dev/drm/amd/display/dc/inc/reg_helper.h
94
#define REG_SET_6(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \
sys/dev/drm/radeon/atombios_encoders.c
1005
args.v4.ucAction = action;
sys/dev/drm/radeon/atombios_encoders.c
1006
args.v4.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
sys/dev/drm/radeon/atombios_encoders.c
1008
args.v4.ucPanelMode = panel_mode;
sys/dev/drm/radeon/atombios_encoders.c
1010
args.v4.ucEncoderMode = atombios_get_encoder_mode(encoder);
sys/dev/drm/radeon/atombios_encoders.c
1012
if (ENCODER_MODE_IS_DP(args.v4.ucEncoderMode))
sys/dev/drm/radeon/atombios_encoders.c
1013
args.v4.ucLaneNum = dp_lane_count;
sys/dev/drm/radeon/atombios_encoders.c
1015
args.v4.ucLaneNum = 8;
sys/dev/drm/radeon/atombios_encoders.c
1017
args.v4.ucLaneNum = 4;
sys/dev/drm/radeon/atombios_encoders.c
1019
if (ENCODER_MODE_IS_DP(args.v4.ucEncoderMode)) {
sys/dev/drm/radeon/atombios_encoders.c
1031
args.v4.acConfig.ucDigSel = enc_override;
sys/dev/drm/radeon/atombios_encoders.c
1033
args.v4.acConfig.ucDigSel = dig->dig_encoder;
sys/dev/drm/radeon/atombios_encoders.c
1034
args.v4.ucBitPerColor = radeon_atom_get_bpc(encoder);
sys/dev/drm/radeon/atombios_encoders.c
1036
args.v4.ucHPD_ID = 0;
sys/dev/drm/radeon/atombios_encoders.c
1038
args.v4.ucHPD_ID = hpd_id + 1;
sys/dev/drm/radeon/atombios_encoders.c
1064
DIG_TRANSMITTER_CONTROL_PARAMETERS_V4 v4;
sys/dev/drm/radeon/atombios_encoders.c
1304
args.v4.ucAction = action;
sys/dev/drm/radeon/atombios_encoders.c
1306
args.v4.usInitInfo = cpu_to_le16(connector_object_id);
sys/dev/drm/radeon/atombios_encoders.c
1308
args.v4.asMode.ucLaneSel = lane_num;
sys/dev/drm/radeon/atombios_encoders.c
1309
args.v4.asMode.ucLaneSet = lane_set;
sys/dev/drm/radeon/atombios_encoders.c
1312
args.v4.usPixelClock = cpu_to_le16(dp_clock / 10);
sys/dev/drm/radeon/atombios_encoders.c
1314
args.v4.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10);
sys/dev/drm/radeon/atombios_encoders.c
1316
args.v4.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
sys/dev/drm/radeon/atombios_encoders.c
1320
args.v4.ucLaneNum = dp_lane_count;
sys/dev/drm/radeon/atombios_encoders.c
1322
args.v4.ucLaneNum = 8;
sys/dev/drm/radeon/atombios_encoders.c
1324
args.v4.ucLaneNum = 4;
sys/dev/drm/radeon/atombios_encoders.c
1327
args.v4.acConfig.ucLinkSel = 1;
sys/dev/drm/radeon/atombios_encoders.c
1329
args.v4.acConfig.ucEncoderSel = 1;
sys/dev/drm/radeon/atombios_encoders.c
1338
args.v4.acConfig.ucRefClkSource = ENCODER_REFCLK_SRC_EXTCLK;
sys/dev/drm/radeon/atombios_encoders.c
1340
args.v4.acConfig.ucRefClkSource = ENCODER_REFCLK_SRC_DCPLL;
sys/dev/drm/radeon/atombios_encoders.c
1342
args.v4.acConfig.ucRefClkSource = pll_id;
sys/dev/drm/radeon/atombios_encoders.c
1346
args.v4.acConfig.ucTransmitterSel = 0;
sys/dev/drm/radeon/atombios_encoders.c
1349
args.v4.acConfig.ucTransmitterSel = 1;
sys/dev/drm/radeon/atombios_encoders.c
1352
args.v4.acConfig.ucTransmitterSel = 2;
sys/dev/drm/radeon/atombios_encoders.c
1357
args.v4.acConfig.fCoherentMode = 1; /* DP requires coherent */
sys/dev/drm/radeon/atombios_encoders.c
1360
args.v4.acConfig.fCoherentMode = 1;
sys/dev/drm/radeon/atombios_encoders.c
1362
args.v4.acConfig.fDualLinkConnector = 1;
sys/dev/drm/radeon/atombios_encoders.c
895
DIG_ENCODER_CONTROL_PARAMETERS_V4 v4;
sys/dev/drm/radeon/radeon_atombios.c
2821
struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 v4;
sys/dev/drm/radeon/radeon_atombios.c
2915
args.v4.ulClock = cpu_to_le32(clock); /* 10 khz */
sys/dev/drm/radeon/radeon_atombios.c
2919
dividers->post_divider = dividers->post_div = args.v4.ucPostDiv;
sys/dev/drm/radeon/radeon_atombios.c
2920
dividers->real_clock = le32_to_cpu(args.v4.ulClock);
sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c
1437
static const struct bwn_smpair v4[] = {
sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c
1516
for (i = 0; i < N(v4); i++)
sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c
1517
BWN_PHY_SETMASK(mac, v4[i].offset, v4[i].mask,
sys/dev/netif/bwn/bwn/if_bwn_phy_lp.c
1518
v4[i].set);
sys/dev/raid/hpt27xx/ldm.h
41
#define __hpt_set_ver(x, v1, v2, v3, v4, v5) x ## _R_ ## v1 ## _ ## v2 ## _ ## v3 ## _ ## v4 ## _ ## v5
sys/dev/raid/hpt27xx/ldm.h
42
#define _hpt_set_ver(x, v1, v2, v3, v4, v5) __hpt_set_ver(x, v1, v2, v3, v4, v5)
sys/dev/raid/hptrr/ldm.h
43
#define __hpt_set_ver(x, v1, v2, v3, v4, v5) x ## _R_ ## v1 ## _ ## v2 ## _ ## v3 ## _ ## v4 ## _ ## v5
sys/dev/raid/hptrr/ldm.h
44
#define _hpt_set_ver(x, v1, v2, v3, v4, v5) __hpt_set_ver(x, v1, v2, v3, v4, v5)
sys/net/pf/pf.c
2201
h->ip_src.s_addr = saddr->v4.s_addr;
sys/net/pf/pf.c
2202
h->ip_dst.s_addr = daddr->v4.s_addr;
sys/net/pf/pf.c
2943
toeplitz_piecemeal_addr(daddr->v4.s_addr) ^
sys/net/pf/pf.c
2944
toeplitz_piecemeal_addr(naddr->v4.s_addr);
sys/net/pf/pf.c
3349
rmsg->nm_saddr->v4, rmsg->nm_sport, rmsg->nm_daddr->v4,
sys/net/pf/pf.c
3393
pi_cpu = tcp_addrcpu(saddr->v4.s_addr, sport, daddr->v4.s_addr, dport);
sys/net/pf/pf.c
3485
inp = in_pcblookup_hash(pi, saddr->v4, sport, daddr->v4,
sys/net/pf/pf.c
3600
dst->sin_addr = addr->v4;
sys/net/pf/pf.c
3680
MD5Update(&ctx, (char *)&pd->src->v4, sizeof(struct in_addr));
sys/net/pf/pf.c
3681
MD5Update(&ctx, (char *)&pd->dst->v4, sizeof(struct in_addr));
sys/net/pf/pf.c
3843
pf_change_a(&saddr->v4.s_addr, pd->ip_sum,
sys/net/pf/pf.c
3844
nk->addr[pd->sidx].v4.s_addr, 0);
sys/net/pf/pf.c
3847
pf_change_a(&daddr->v4.s_addr, pd->ip_sum,
sys/net/pf/pf.c
3848
nk->addr[pd->didx].v4.s_addr, 0);
sys/net/pf/pf.c
3879
pf_change_a(&saddr->v4.s_addr,
sys/net/pf/pf.c
3881
nk->addr[pd->sidx].v4.s_addr, 0);
sys/net/pf/pf.c
3885
pf_change_a(&daddr->v4.s_addr,
sys/net/pf/pf.c
3887
nk->addr[pd->didx].v4.s_addr, 0);
sys/net/pf/pf.c
502
p.pfra_ip4addr = state->src_node->addr.v4;
sys/net/pf/pf.c
5238
pf_change_a(&saddr->v4.s_addr,
sys/net/pf/pf.c
5240
nk->addr[pd->sidx].v4.s_addr, 0);
sys/net/pf/pf.c
5244
pf_change_a(&daddr->v4.s_addr,
sys/net/pf/pf.c
5246
nk->addr[pd->didx].v4.s_addr, 0);
sys/net/pf/pf.c
5834
pf_change_a(&pd->src->v4.s_addr,
sys/net/pf/pf.c
5836
nk->addr[pd->sidx].v4.s_addr,
sys/net/pf/pf.c
5841
pf_change_a(&pd->dst->v4.s_addr,
sys/net/pf/pf.c
5843
nk->addr[pd->didx].v4.s_addr,
sys/net/pf/pf.c
5938
dst->sin_addr = addr->v4;
sys/net/pf/pf.c
6013
dst->sin_addr = addr->v4;
sys/net/pf/pf.c
6117
dst->sin_addr.s_addr = naddr.v4.s_addr;
sys/net/pf/pf.c
6123
s->rt_addr.v4.s_addr;
sys/net/pf/pf.c
6759
(ntohl(pd.dst->v4.s_addr) >> IN_CLASSA_NSHIFT) == IN_LOOPBACKNET)
sys/net/pf/pf.c
6770
divert->addr.ipv4 = r->divert.addr.v4;
sys/net/pf/pfvar.h
159
struct in_addr v4;
sys/net/pf/pfvar.h
165
#define v4 pfa.v4
sys/net/pf/pfvar.h
370
(a)->v4.s_addr = (b)->v4.s_addr
sys/vfs/hammer2/xxhash/xxhash.c
347
U32 v4 = seed - PRIME32_1;
sys/vfs/hammer2/xxhash/xxhash.c
353
v4 = XXH32_round(v4, XXH_get32bits(p)); p+=4;
sys/vfs/hammer2/xxhash/xxhash.c
356
h32 = XXH_rotl32(v1, 1) + XXH_rotl32(v2, 7) + XXH_rotl32(v3, 12) + XXH_rotl32(v4, 18);
sys/vfs/hammer2/xxhash/xxhash.c
447
U64 v4 = seed - PRIME64_1;
sys/vfs/hammer2/xxhash/xxhash.c
453
v4 = XXH64_round(v4, XXH_get64bits(p)); p+=8;
sys/vfs/hammer2/xxhash/xxhash.c
456
h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18);
sys/vfs/hammer2/xxhash/xxhash.c
460
h64 = XXH64_mergeRound(h64, v4);
sys/vfs/hammer2/xxhash/xxhash.c
562
state.v4 = seed - PRIME32_1;
sys/vfs/hammer2/xxhash/xxhash.c
576
state.v4 = seed - PRIME64_1;
sys/vfs/hammer2/xxhash/xxhash.c
605
state->v4 = XXH32_round(state->v4, XXH_readLE32(p32, endian)); p32++;
sys/vfs/hammer2/xxhash/xxhash.c
616
U32 v4 = state->v4;
sys/vfs/hammer2/xxhash/xxhash.c
622
v4 = XXH32_round(v4, XXH_readLE32(p, endian)); p+=4;
sys/vfs/hammer2/xxhash/xxhash.c
628
state->v4 = v4;
sys/vfs/hammer2/xxhash/xxhash.c
658
h32 = XXH_rotl32(state->v1, 1) + XXH_rotl32(state->v2, 7) + XXH_rotl32(state->v3, 12) + XXH_rotl32(state->v4, 18);
sys/vfs/hammer2/xxhash/xxhash.c
723
state->v4 = XXH64_round(state->v4, XXH_readLE64(state->mem64+3, endian));
sys/vfs/hammer2/xxhash/xxhash.c
733
U64 v4 = state->v4;
sys/vfs/hammer2/xxhash/xxhash.c
739
v4 = XXH64_round(v4, XXH_readLE64(p, endian)); p+=8;
sys/vfs/hammer2/xxhash/xxhash.c
745
state->v4 = v4;
sys/vfs/hammer2/xxhash/xxhash.c
778
U64 const v4 = state->v4;
sys/vfs/hammer2/xxhash/xxhash.c
780
h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18);
sys/vfs/hammer2/xxhash/xxhash.c
784
h64 = XXH64_mergeRound(h64, v4);
sys/vfs/hammer2/xxhash/xxhash.h
254
unsigned v4;
sys/vfs/hammer2/xxhash/xxhash.h
265
unsigned long long v4;
usr.bin/systat/pftop.c
146
if (ntohl(nk1->addr[0].v4.s_addr) <
usr.bin/systat/pftop.c
147
ntohl(nk2->addr[0].v4.s_addr))
usr.bin/systat/pftop.c
149
if (ntohl(nk1->addr[0].v4.s_addr) >
usr.bin/systat/pftop.c
150
ntohl(nk2->addr[0].v4.s_addr))
usr.bin/systat/pftop.c
152
if (ntohl(nk1->addr[1].v4.s_addr) <
usr.bin/systat/pftop.c
153
ntohl(nk2->addr[1].v4.s_addr))
usr.bin/systat/pftop.c
155
if (ntohl(nk1->addr[1].v4.s_addr) >
usr.bin/systat/pftop.c
156
ntohl(nk2->addr[1].v4.s_addr))
usr.bin/systat/pftop.c
477
(ntohl(addr->v4.s_addr) >> 24) & 255,
usr.bin/systat/pftop.c
478
(ntohl(addr->v4.s_addr) >> 16) & 255,
usr.bin/systat/pftop.c
479
(ntohl(addr->v4.s_addr) >> 8) & 255,
usr.bin/systat/pftop.c
480
(ntohl(addr->v4.s_addr) >> 0) & 255);
usr.sbin/authpf/authpf.c
777
if (inet_pton(AF_INET, ipsrc, &target.v4) == 1)
usr.sbin/ftp-proxy/filter.c
125
memcpy(&pfp.addr.addr.v.a.addr.v4,
usr.sbin/ftp-proxy/filter.c
264
memcpy(&pfr.rule.src.addr.v.a.addr.v4,
usr.sbin/ftp-proxy/filter.c
267
memcpy(&pfr.rule.dst.addr.v.a.addr.v4,
usr.sbin/ftp-proxy/filter.c
346
memcpy(&pnl.saddr.v4, &client->sin_addr.s_addr, sizeof pnl.saddr.v4);
usr.sbin/ftp-proxy/filter.c
347
memcpy(&pnl.daddr.v4, &proxy->sin_addr.s_addr, sizeof pnl.daddr.v4);
usr.sbin/ftp-proxy/filter.c
357
memcpy(&server->sin_addr.s_addr, &pnl.rdaddr.v4,
usr.sbin/ftp-proxy/filter.c
92
memcpy(&pfp.addr.addr.v.a.addr.v4,
usr.sbin/pfctl/pf_print_state.c
149
sin.sin_addr = addr->v4;
usr.sbin/pfctl/pfctl.c
416
bzero(&mask->v4, sizeof(mask->v4));
usr.sbin/pfctl/pfctl.c
417
mask->v4.s_addr = htonl((u_int32_t)
usr.sbin/pfctl/pfctl.c
467
psnk.psnk_src.addr.v.a.addr.v4 =
usr.sbin/pfctl/pfctl.c
504
psnk.psnk_dst.addr.v.a.addr.v4 =
usr.sbin/pfctl/pfctl.c
573
psk.psk_src.addr.v.a.addr.v4 =
usr.sbin/pfctl/pfctl.c
610
psk.psk_dst.addr.v.a.addr.v4 =