urtwn_read_2
reg = urtwn_read_2(sc, R92C_SYS_ISO_CTRL);
reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN);
reg = urtwn_read_2(sc, R92C_SYS_CLKR);
static uint16_t urtwn_read_2(struct urtwn_softc *, uint16_t);
urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC);
if (!(urtwn_read_2(sc, R92C_APS_FSMCO) &
urtwn_read_2(sc, R92C_SYS_ISO_CTRL) & ~R92C_SYS_ISO_CTRL_DIOR);
reg = urtwn_read_2(sc, R92C_CR);
urtwn_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APDM_HPDN);
urtwn_read_2(sc, R92C_APS_FSMCO) &
urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC);
if (!(urtwn_read_2(sc, R92C_APS_FSMCO) &
reg = urtwn_read_2(sc, R92C_CR);
reg = urtwn_read_2(sc, R92C_GPIO_IO_SEL) & ~0x00f0;
reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN);
reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN);
urtwn_read_2(sc, R92C_SYS_FUNC_EN) |
reg = urtwn_read_2(sc, R92C_TRXDMA_CTRL);
urtwn_read_2(sc, R92C_SYS_FUNC_EN) |
urtwn_read_2(sc, R92C_CR) | R92C_CR_MACTXEN |