to_intel_crtc_state
return intel_plane_atomic_check_with_state(to_intel_crtc_state(old_crtc_state),
to_intel_crtc_state(new_crtc_state),
struct intel_crtc_state *intel_crtc_state = to_intel_crtc_state(crtc_state);
to_intel_crtc_state(crtc_state));
to_intel_crtc_state(crtc_state);
struct intel_crtc_state *intel_state = to_intel_crtc_state(state);
struct intel_crtc_state *intel_state = to_intel_crtc_state(state);
to_intel_crtc_state(state));
i9xx_load_luts_internal(crtc, NULL, to_intel_crtc_state(state));
crtc_state = to_intel_crtc_state(crtc->base.state);
struct intel_crtc_state *pipe_config = to_intel_crtc_state(crtc_state);
to_intel_crtc_state(crtc_state),
to_intel_crtc_state(crtc_state)->active_planes &= ~BIT(plane->id);
to_intel_crtc_state(crtc_state);
sw_wm = &to_intel_crtc_state(new_state)->wm.skl.optimal;
pipe_config = to_intel_crtc_state(old_crtc_state);
sw_config = to_intel_crtc_state(new_crtc_state);
struct intel_crtc_state *old_state = to_intel_crtc_state(old_crtc_state);
struct intel_crtc_state *new_state = to_intel_crtc_state(new_crtc_state);
!to_intel_crtc_state(new_state)->update_pipe)
to_intel_crtc_state(old_crtc_state)->shared_dpll;
to_intel_crtc_state(new_crtc_state)->shared_dpll = NULL;
other_crtc_state = to_intel_crtc_state(crtc_state);
first_crtc_state = to_intel_crtc_state(crtc_state);
to_intel_crtc_state(crtc_state);
to_intel_crtc_state(old_crtc_state),
struct intel_crtc_state *pipe_config = to_intel_crtc_state(new_crtc_state);
intel_pre_plane_update(to_intel_crtc_state(old_crtc_state),
entries[i] = &to_intel_crtc_state(old_crtc_state)->wm.skl.ddb;
cstate = to_intel_crtc_state(new_crtc_state);
&to_intel_crtc_state(old_crtc_state)->wm.skl.ddb) &&
to_intel_crtc_state(new_crtc_state)->update_pipe) {
to_intel_crtc_state(new_crtc_state));
intel_pre_plane_update(to_intel_crtc_state(old_crtc_state),
to_intel_crtc_state(new_crtc_state));
dev_priv->display.crtc_disable(to_intel_crtc_state(old_crtc_state), state);
to_intel_crtc_state(new_crtc_state));
to_intel_crtc(crtc)->config = to_intel_crtc_state(new_crtc_state);
intel_cstate = to_intel_crtc_state(new_crtc_state);
intel_post_plane_update(to_intel_crtc_state(old_crtc_state));
to_intel_crtc_state(old_crtc_state);
to_intel_crtc_state(crtc_state)->update_pipe)
ret = intel_plane_atomic_check_with_state(to_intel_crtc_state(crtc->state),
to_intel_crtc_state(crtc->state), /* FIXME need a new crtc state? */
to_intel_crtc_state(crtc->state),
struct intel_crtc_state *cs = to_intel_crtc_state(cstate);
to_intel_crtc_state(crtc->state)->wm = cs->wm;
to_intel_crtc_state(crtc->base.state) : NULL;
crtc_state = to_intel_crtc_state(crtc->base.state);
to_intel_crtc_state(crtc->base.state);
to_intel_crtc_state(crtc->base.state);
to_intel_crtc_state(crtc->base.state);
crtc_state = to_intel_crtc_state(crtc->base.state);
to_intel_crtc_state(crtc->base.state);
crtc_state = to_intel_crtc_state(encoder->base.crtc->state);
to_intel_crtc_state(crtc->base.state);
hsw_disable_ips(to_intel_crtc_state(crtc->state));
(new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \
crtc_state = to_intel_crtc_state(crtc->base.state);
slots = to_intel_crtc_state(crtc_state)->dp_m_n.tu;
to_intel_crtc_state(crtc_state)->dp_m_n.tu = 0;
return to_intel_crtc_state(drm_atomic_get_old_crtc_state(&state->base,
return to_intel_crtc_state(drm_atomic_get_new_crtc_state(&state->base,
return to_intel_crtc_state(crtc_state);
cstate = to_intel_crtc_state(crtc->base.state);
*alloc = to_intel_crtc_state(for_crtc->state)->wm.skl.ddb;
struct intel_crtc_state *intel_cstate = to_intel_crtc_state(cstate);
to_intel_crtc_state(cstate);
&to_intel_crtc_state(crtc->state)->wm.skl.optimal;
cstate = to_intel_crtc_state(crtc->state);
struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
to_intel_crtc_state(crtc->base.state);
to_intel_crtc_state(crtc->base.state);
to_intel_crtc_state(crtc->base.state);
to_intel_crtc_state(crtc->base.state);
to_intel_crtc_state(crtc->base.state);
to_intel_crtc_state(crtc->base.state);
crtc_state = to_intel_crtc_state(crtc->state);