siba_read_4_sub
static uint32_t siba_read_4_sub(struct siba_dev_softc *, uint16_t);
val = siba_read_4_sub(sd, SIBA_TGSLOW);
siba_read_4_sub(sd, SIBA_TGSLOW);
if (siba_read_4_sub(sd, SIBA_TGSHIGH) & SIBA_TGSHIGH_SERR)
val = siba_read_4_sub(sd, SIBA_IAS);
siba_read_4_sub(sd, SIBA_TGSLOW);
siba_read_4_sub(sd, SIBA_TGSLOW);
uint32_t rev = siba_read_4_sub(sd, SIBA_IDLOW) & SIBA_IDLOW_SSBREV;
if (siba_read_4_sub(sd, SIBA_TGSLOW) & SIBA_TGSLOW_RESET)
val = siba_read_4_sub(sd, SIBA_TGSLOW);
val = siba_read_4_sub(sd, SIBA_TGSHIGH);
siba_read_4_sub(sd, SIBA_TGSLOW);
siba_read_4_sub(sd, SIBA_TGSLOW);
tmp = siba_read_4_sub(psd, SIBA_IMCFGLO);
siba_read_4_sub(sd, SIBA_PCICORE_BCAST_ADDR);
siba_read_4_sub(sd, SIBA_PCICORE_BCAST_DATA);
tmp = siba_read_4_sub(sd, SIBA_TPS);
siba_read_4_sub(psd, SIBA_INTR_MASK) | (1 << tmp));
return (siba_read_4_sub(spc->spc_dev, offset));
return (siba_read_4_sub(gpiodev, SIBA_GPIOCTL));
tmp = siba_read_4_sub(sd, SIBA_IMCFGLO) &
return (siba_read_4_sub(sd, offset));
siba_read_4_sub((scc)->scc_dev, offset)