Symbol: CP_ME_CNTL
sys/dev/drm/amd/amdgpu/gfx_v8_0.c
4192
tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_HALT, 0);
sys/dev/drm/amd/amdgpu/gfx_v8_0.c
4193
tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_HALT, 0);
sys/dev/drm/amd/amdgpu/gfx_v8_0.c
4194
tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, CE_HALT, 0);
sys/dev/drm/amd/amdgpu/gfx_v8_0.c
4196
tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_HALT, 1);
sys/dev/drm/amd/amdgpu/gfx_v8_0.c
4197
tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_HALT, 1);
sys/dev/drm/amd/amdgpu/gfx_v8_0.c
4198
tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, CE_HALT, 1);
sys/dev/drm/amd/amdgpu/gfx_v9_0.c
2537
tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, ME_HALT, enable ? 0 : 1);
sys/dev/drm/amd/amdgpu/gfx_v9_0.c
2538
tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, PFP_HALT, enable ? 0 : 1);
sys/dev/drm/amd/amdgpu/gfx_v9_0.c
2539
tmp = REG_SET_FIELD(tmp, CP_ME_CNTL, CE_HALT, enable ? 0 : 1);
sys/dev/drm/radeon/cik.c
3892
WREG32(CP_ME_CNTL, 0);
sys/dev/drm/radeon/cik.c
3896
WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT));
sys/dev/drm/radeon/cik.c
4973
WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT);
sys/dev/drm/radeon/cik.c
5177
WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT);
sys/dev/drm/radeon/evergreen.c
3000
WREG32(CP_ME_CNTL, cp_me);
sys/dev/drm/radeon/evergreen.c
3891
WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT);
sys/dev/drm/radeon/evergreen.c
4001
WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT);
sys/dev/drm/radeon/ni.c
1474
WREG32(CP_ME_CNTL, 0);
sys/dev/drm/radeon/ni.c
1478
WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT));
sys/dev/drm/radeon/ni.c
1856
WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT);
sys/dev/drm/radeon/rv770.c
1080
WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT));
sys/dev/drm/radeon/si.c
3453
WREG32(CP_ME_CNTL, 0);
sys/dev/drm/radeon/si.c
3457
WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT));
sys/dev/drm/radeon/si.c
3866
WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT);
sys/dev/drm/radeon/si.c
4035
WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT);